Method and apparatus for input-buffered asynchronous transfer mo

Multiplex communications – Wide area network – Packet switching

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Details

370 856, H04J 326

Patent

active

051269996

ABSTRACT:
An ATM packet switching system has output segregated input buffers, which are operated on a realtime by crosspoint selection circuits implementing a combined buffer fill/age algorithm to come up with a new selection every packet cycle.

REFERENCES:
patent: 4730305 (1988-03-01), Acampora et al.
patent: 4868813 (1989-09-01), Suzuki
patent: 4899335 (1990-02-01), Johnson, Jr. et al.
patent: 4947388 (1990-08-01), Kuwahara et al.

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