Method and apparatus for injecting errors into an array built-in

Details Method and apparatus for injecting errors into an array built-in Method and apparatus for injecting errors into an array built-in

1996-08-19

1997-09-16

Canney, Vincent P.

Excavating

9518306, G06F 1108

Patent

active

056688164

ABSTRACT:
An improved method and apparatus are provided for injecting errors in an array built-in self-test (ABIST) for an array in an integrated circuit driven by at least one controller. The error generation and insertion apparatus is used with the ABIST and includes registers that are set for selecting error injection; for selecting a predetermined ABIST test pattern; and for selecting an address in the array for injecting an error in the predetermined ABIST test pattern. An ABIST pattern is compared with the selected predetermined ABIST test pattern, and the selected address in the array for injecting the error is compared with an ABIST address for the ABIST pattern. The ABIST data is inverted responsive to the selected address in the array for injecting the error equal to the ABIST address. A single bit error or a multiple bit error is selected for an address or all addresses of the array.

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