Method and apparatus for in-circuit testing of sockets

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S537000

Reexamination Certificate

active

06734683

ABSTRACT:

BACKGROUND
FIELD OF THE INVENTION
This invention relates to in-circuit testing of sockets, and more specifically to in-circuit testing of any opens on all pins of a socket, including hard to see pins such as pins in ball grid array sockets.
BACKGROUND INFORMATION
Computers and other electronic devices have undergone steady advances in technology. Processors, the heart of most computers, are being developed that operate at faster and faster speeds. This is due in part to the die size of processors and other electronic devices decreasing. The technology of processor sockets has also evolved. Processor socket mounting has evolved from through board pins to surface mounting such as with a ball grid array socket.
Surface mount technology, such as ball grid arrays, present challenges from a manufacturing point of view. With ball grid array technology, visual inspection of the solder joints is not possible. Open solder joints of any of the signal pins may result in the attached processor malfunctioning, or failing to boot altogether. Opens on the power pins or ground pins may cause a processor to malfunction under heavy load, or may cause hot spots due to excessive current in the connected power and ground pins.
Since visual inspection of the solder joints on a ball grid array attached to a printed circuit board is not possible, other methods are currently used to check the ball grid array connections. Currently, the processor or other electronic device, being plugged into a surface mount ball grid array socket, may include registers on the input/output signals of the die. These are commonly called boundary scan registers, and allow testing of signal lines coming into and leaving the die. Boundary scan testing generally exercises signal pins, but not power and ground pins independently. Therefore, there is no pin-by-pin granularity during boundary scan testing. Further, boundary scan testing may not test all signal pins. This may be because all input/output signal pins may not have a boundary scan register associated with it.
In standard in-circuit testing, where all components/devices may be populated and powered up on a printed circuit board/motherboard, test routines usually exist for bridging and shorts between pins. Test points on the motherboard allow for the connection of probes from a high-end tester allowing for the checking of bridging and shorts. The high-end testers (e.g., HP3070, GENRAD machines, etc.), supply power and ground to the motherboard and, therefore, to the sockets and/or devices populated on the motherboard. However, current in-circuit testing does not provide adequate testing of open connections on signal pins, power pins, or ground pins between a surface mounted socket and a printed circuit board.


REFERENCES:
patent: 5811977 (1998-09-01), Rouchaud
patent: 6291978 (2001-09-01), Chandler et al.
patent: 1 022 571 (2000-07-01), None
patent: 57-204459 (1982-12-01), None
patent: 6 212 0647 (1987-06-01), None
patent: 6 222 3679 (1987-10-01), None

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