Method and apparatus for improving stability and lock time...

Details Method and apparatus for improving stability and lock time... Method and apparatus for improving stability and lock time...

2005-01-04

2005-01-04

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000, C327S141000, C327S142000, C327S154000, C327S155000, C327S156000, C327S158000, C327S159000

Reexamination Certificate

active

06839301

ABSTRACT:
Delay-locked loops, signal locking methods and devices and system incorporating delay-locked loops are described. A delay-locked loop includes a forward delay path, a feedback delay path, a phase detector and a timer circuit. The forward delay path alternatively couples to an external clock signal and to an internal test signal. The phase detector adjusts a delay line based upon the phase differences of a feedback signal and the external clock signal. The timer circuit switches the test signal into the forward delay path and measures the time of traversal of the test signal around the forward delay path and the feedback delay path and generates a time constant for configuring the phase detector's update period. The phase detector is thereafter able to stabilize at an improved rate.

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