Method and apparatus for improving die planarity and global unif

Abrading – Abrading process – Glass or stone abrading

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451 5, 451287, 451288, B24B 100

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061134651

ABSTRACT:
The present invention provides methods and apparatus for optimizing the removal of thin film layers during planarization of a semiconductor wafer to achieve global uniformity of the entire semiconductor surface while further achieving the planarity within an individual die structure. A wafer polishing system suitably comprises a wafer polishing apparatus, a controller and a wafer polishing recipe. The wafer polishing recipe may be comprised of various operational parameters utilized for controlling the operation of the polishing apparatus. In a preferred embodiment, the wafer polishing apparatus is initiated with a low down force applied by a carrier apparatus and a high polishing speed applied by a polishing surface to facilitate removal of the thin film layer and optimize the planarity within a single die structure, and then followed with a high down force applied by the carrier apparatus and a low polishing speed applied by the polishing surface to facilitate removal of the thin film layer to optimize the global uniformity of the entire wafer surface. Alternatively, the low down force--high polishing speed and high down force--low polishing speed steps may be reversed without departing from the scope of the invention.

REFERENCES:
patent: 4805348 (1989-02-01), Arai et al.
patent: 4889586 (1989-12-01), Noguchi et al.
patent: 5099614 (1992-03-01), Arai et al.
patent: 5329732 (1994-07-01), Karlsrud et al.
patent: 5335453 (1994-08-01), Baldy et al.
patent: 5361545 (1994-11-01), Nakamura
patent: 5486129 (1996-01-01), Sandhu et al.
patent: 5486265 (1996-01-01), Salugsugan
patent: 5498196 (1996-03-01), Karlsrud et al.
patent: 5498199 (1996-03-01), Karlsrud et al.
patent: 5503882 (1996-04-01), Dawson
patent: 5506177 (1996-04-01), Kishimoto et al.
patent: 5509850 (1996-04-01), Morioka et al.
patent: 5510652 (1996-04-01), Burke et al.
patent: 5514245 (1996-05-01), Doan et al.
patent: 5562530 (1996-10-01), Runnels et al.
patent: 5569063 (1996-10-01), Morioka et al.
patent: 5605487 (1997-02-01), Hileman et al.
patent: 5618381 (1997-04-01), Doan et al.
patent: 5643056 (1997-07-01), Hirose et al.
patent: 5665201 (1997-09-01), Sahota
patent: 5679060 (1997-10-01), Leonard et al.
patent: 5692947 (1997-12-01), Talieh et al.
patent: 5707274 (1998-01-01), Kim et al.
patent: 5722877 (1998-03-01), Meyer et al.
patent: 5733171 (1998-03-01), Allen et al.
patent: 5733177 (1998-03-01), Tsuchiya et al.
Notification of Transmittal of the Interational Search Report or the Declaration; PCT/US 99/13297; Date of mailing Nov. 2, 1999.
Ali et al.: "Using variation decomposition analysis to determine the effect of process on wafer--and die--level uniformity in oxide CMP"; Proceedings of the First International Symposium on Chemica Mechanical Planarization, Oct. 1996 (1996-10), pp. 164-175, XP002119213, San Antonio, Texas; pp. 164, 166, and 168; figures 3-11; table I.

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