Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate
2004-08-30
2009-06-30
Dam, Tuan Q (Department: 2192)
Data processing: software development, installation, and managem
Software program development tool
Translation of code
C717S144000, C717S146000
Reexamination Certificate
active
07555748
ABSTRACT:
Inter-procedural strength reduction is provided by a mechanism of the present invention to improve data cache performance. During a forward pass, the present invention collects information of global variables and analyzes the usage pattern of global objects to select candidate computations for optimization. During a backward pass, the present invention remaps global objects into smaller size new global objects and generates more cache efficient code by replacing candidate computations with indirect or indexed reference of smaller global objects and inserting store operations to the new global objects for each computation that references the candidate global objects.
REFERENCES:
patent: 5768596 (1998-06-01), Chow et al.
patent: 5812855 (1998-09-01), Hiranandani et al.
patent: 5850549 (1998-12-01), Blainey et al.
patent: 6059839 (2000-05-01), Dehnert et al.
patent: 6131189 (2000-10-01), Chow et al.
patent: 6286135 (2001-09-01), Santhanam
patent: 6675368 (2004-01-01), Takayanagi et al.
patent: 6675378 (2004-01-01), Schmidt
patent: 6738967 (2004-05-01), Radigan
patent: 2002/0010911 (2002-01-01), Cheng et al.
patent: 2002/0162096 (2002-10-01), Robison
patent: 2002/0184615 (2002-12-01), Sumner et al.
patent: 2003/0177472 (2003-09-01), de Jong
Ki-I1 Kum, Jiyang Kang, Wony ong Sung, AutoScaler For C: An Optimzing Floatin-Point to Integer C Program Converter For Fixed-Point Digital Signal Processors, 2000, IEEE, vol. 47, pp. 840-848.
Greenwald, “A Technique for Compilation to Exposed Memory Hierarchy”, Massachusetts Institute of Technology, 1999, pp. 1-56.
Amarasinghe et al., “Strength Reduction of Integer Division and Modulo Operations”, MIT Laboratory for Computer Science, MIT-LCS-TM-600, LCS Category: Computer Architecture, Nov. 1, 1999, pp. 1-17.
Cooper et al., “An Efficient Static Analysis Algorithm to Detect Redundant Memory Operations”, Memory System Performance, Proceedings of the Workshop on Memory System Performance, Berlin, Germany, pp. 1-12, 2003.
Banning, “An Efficient Way to Find the Side Effects of Procedure Calls and the Aliases of Variables”, Annual Symposium on Principles of Programming Languages, Proceedings of the 6thACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages, San Antonio, Texas, pp. 29-41, 1979.
Cytron et al., “Efficient Accommodation of May-Alias Information In SSA Form”, ACM-SIGPLAN-PLDI-6/93/Albuquerque, New Mexico, 1993, pp. 36-45.
Choi et al., “Efficient Flow-Sensitive Interprocedural Computation of Pointer-Induced Aliases and Side Effects”, Annual Symposium on Principles of Programming Languages, Proceedings of the 20thACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, Charleston, South Carolina, pp. 232-245, 1993.
Cooper et al., “Interprocedural Side-Effect Analysis In Linear Time”, Proceedings of the SIGPLAN '88 Conference on Programming Language Design and Implementation, Atlanta, GA Jun. 1988, pp. 57-66.
Burke, “An Interval-Based Approach to Exhaustive and Incremental Interprocedural Data-Flow Analysis”, ACM Transactions on Programming Languages and Systems, vol. 12, No. 3, Jul. 1990, pp. 341-395.
Hind et al., “Interprocedural Pointer Alias Analysis”, ACM Transactions on Programming Languages and Systems, vol. 21, No. 4, Jul. 1999, pp. 848-894.
Archambault et al., Method and Apparatus for Optimizing Software Program Using Inter-Procedural Strength Reduction.
Bentley, Rules for Code Tuning (Appendix 4 of Programming Pearls), 2000, Addison-Wesley Inc., Second Edition, pp. 1-6, Retrieved Aug. 21, 2008. http://www.cs.bell-labs.com/cm/cs/pearls/index.html.
Archambault Roch Georges
Cui Shimin
Gao Yaoqing
Silvera Raul Esteban
Bui Hanh T
Dam Tuan Q
International Business Machines - Corporation
Poimboeuf Jill A.
Yee & Associates P.C.
LandOfFree
Method and apparatus for improving data cache performance... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for improving data cache performance..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for improving data cache performance... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4063436