Method and apparatus for improving access speed in a random acce

Details Method and apparatus for improving access speed in a random acce Method and apparatus for improving access speed in a random acce

1977-08-24

1979-05-29

Nusbaum, Mark E.

Boots, shoes, and leggings

364900, G06F 734, G06F 906

Patent

active

041569059

ABSTRACT:
A method and apparatus for increasing access speed in a random access memory comprising the utilization of a prefetch register for receiving and temporarily storing a first address portion representing the location of a group of words stored in memory. The first address portion is subsequently utilized to access memory to retrieve a group of words to be stored in memory output registers; a second address portion is utilized to select words contained in the output registers of the memory. Several second address portions may address the various words stored in the output registers of the memory while the first address portion remains the same. When a subsequent group of words is to be accessed, a second first address portion is loaded into the prefetch register and the first address portion of the current requested address is compared with the presently used first address portion; a miscomparison generates a miscompare signal which clocks a new group of words into the output registers of the memory and simultaneously transfers the first address portion in the prefetch register to a present fetch register. Words are then retrieved from memory through the decoding of the second address portion to access words stored in the output registers.

REFERENCES:
patent: 3244470 (1966-03-01), Hagelbarger et al.
patent: 3654622 (1972-04-01), Beausoleil
patent: 4048671 (1977-09-01), Callahan et al.

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