Dynamic magnetic information storage or retrieval – General processing of a digital signal – Head amplifier circuit
Reexamination Certificate
2005-10-11
2005-10-11
Hudspeth, David (Department: 2651)
Dynamic magnetic information storage or retrieval
General processing of a digital signal
Head amplifier circuit
C360S062000
Reexamination Certificate
active
06954321
ABSTRACT:
Magneto-Resistive (MR) head read/write channel (400) provides timer (421), detector (433) and amplifier (432) to reduce the amount of time required to transition from read mode to write mode. Controller (410) issues the write command (WGATE) to signal a pending mode change from read to write mode. While read/write channel (400) remains in read mode, timer (421) begins a configurable countdown sequence, which allows Arm Electronics (430), except for a final output stage of amplifier (432), to power up in preparation for write mode. Once timer (421) has reached terminal count, signal (CHWGATE) is de-asserted, which causes write channel (422) to warm up. After warm up, write channel (422) writes serial data (WRITE DATA) to detector (433). Still in read mode, detector (433) detects the presence of WRITE DATA from write channel (422) and asserts signal (AEWGATE). The assertion of signal (AEWGATE) cancels read mode and enables amplifier (432) to source current to MR head (440) in response to WRITE DATA to begin a fully operational write mode.
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Freitas David A.
Vannorsdel Kevin R.
Chambliss, Banner & Stophel
Hitachi Global Storage Technologies - Netherlands B.V.
Hudspeth David
Lynch David W.
Slavitt Mitchell
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