Method and apparatus for improved instruction counting schemes

Details Method and apparatus for improved instruction counting schemes Method and apparatus for improved instruction counting schemes

1996-10-31

1998-06-09

Harrell, Robert B.

G06F 1128

Patent

active

057648840

ABSTRACT:
A method and apparatus for monitoring the execution of a procedure having multiple exit points without modifying the software via breakpoints. The starting address of the procedure is loaded into an Instruction Address Break Register (IABR). Upon execution of the starting address the IABR raises an exception. The processing of the exception is used to implement a counting routine and for loading the IABR with the address of the calling party via the Link Register. Upon execution of the address of the calling party, the IABR once again raises an exception. The processing of the second exception is used for stopping the counter and performing any related analysis.

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