Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Nonlinear amplifying circuit
Reexamination Certificate
2008-03-18
2008-03-18
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Nonlinear amplifying circuit
C330S277000
Reexamination Certificate
active
07345528
ABSTRACT:
A clock signal preamplifier comprises complementary pairs of differentially coupled transistors, with an output signal coupled to an inverter further comprising a totem-pole arrangement of complementary MOSFET transistors. The input signal to the preamplifier is typically sinusoidal, and the output signal is rectangular. Preferably, the differentially coupled transistors are bipolar, and a pair of diode clamper circuits with bipolar transistors is preferably coupled to the complementary pairs of differentially coupled transistors. A reference voltage source is coupled to the control terminals of the clamper transistors. A reference voltage source, which preferably comprises a totem-pole arrangement of complementary MOSFET transistors with its output node is coupled to its input node, provides a reference voltage for the diode clamper circuits. Preferably, MOSFET transistors of the reference voltage source and MOSFET transistors of like kind of the inverter are configured to have substantially identical threshold voltages.
REFERENCES:
patent: 5939942 (1999-08-01), Greason et al.
patent: 6826390 (2004-11-01), Tamura
patent: 7099098 (2006-08-01), Posat et al.
Bugeja, A. R., et al. “Design of a 14b 100MS/s Switched-Capacitor Pipelined ADC in RFSiGe BiCMOS,” IEEE, 2001, pp. 428-431.
Haddad, R. A. et al., “Digital Signal Processing,” W. H. Freeman and Co., 1991, pp. 36-38.
“LTC1748, 14-Bit, 80Msps Low Noise ADC,” Linear Technology Corp., 2003, pp. 1-20.
McNeill, J. A., “Jitter in Ring Oscillators,” IEEE Journal of Solid-State Circuits, Jun. 1997, pp. 870-879, vol. 32, No. 6.
Sedra, A. S., “Microelectric Circuits,” 1991, pp. 1030-1031, Saunders College Publishing.
Shinagawa, M., et al., “Jitter Analysis of High-Speed Sampling Systems,” IEEE Journal of Solid-State Circuits, Feb. 1990, pp. 220-224, vol. 25, No. 1.
Zanchi, A., et al., “A 16b 65MSps Pipeline ADC Core with 230fs Clock Jitter in 3.3V SiGe BiCMOS: from Simulation to Silicon,” IEEE Journal of Solid-State Circuits, 2004 pp. 177-180.
Zanchi, A., et al., “Measurement and Spice Prediction of Sub-Picosecond Clock Jitter in A-to-D Converters,” IEEE, 2003, pp. 557-560.
Corsi Marco
Zanchi Alfio
Brady III Wade J.
Franz Warren L.
Le Dinh T.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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