Method and apparatus for implementing a priority adjustment of a

Boots – shoes – and leggings

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3642414, 364DIG1, 3649416, 364DIG2, G06F 1300, G06F 1324

Patent

active

052573575

ABSTRACT:
An interrupt mechanism allows an interrupt request signal to be adjusted to any priority level specified by the user and provides to a CPU an encoded interrupt signal which either indicates that the interrupt priority has been adjusted or identifies a highest prioritized interrupt request when no adjustment in priority is made. A first logic circuit functions to receive a priority adjust request signal and compares the adjust signal with one or more interrupt signals to determine if an adjustment is required. A second logic circuit functions to identify the highest prioritized interrupt request of a plurality of interrupt requests and provides the encoded interrupt signal in response thereto. In one form, the encoded interrupt signal is translated into a value for use in a software exception processing routine within the CPU. The software exception processing routine can perform a variety of user specified functions with the encoded adjusted priority interrupt signal.

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patent: 5083261 (1992-01-01), Wilkie

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