Method and apparatus for implementing a multiple constraint...

Details Method and apparatus for implementing a multiple constraint... Method and apparatus for implementing a multiple constraint...

2007-08-21

2007-08-21

Ha, Dac V. (Department: 2611)

Pulse or digital communications

Systems using alternating or pulsating current

Plural channels for transmission of a single pulse train

C375S341000, C714S792000, C714S795000, C714S796000

Reexamination Certificate

active

10331707

ABSTRACT:
A Viterbi decoder capable of decoding a code having a maximum constraint length of Lmaxis disclosed. The Viterbi decoder includes an initializer unit that initializes selected states of an encoder during an initial time period to allow the Viterbi decoder to also decode codes having a constraint length less than Lmax.

REFERENCES:
patent: 5327441 (1994-07-01), Kawazoe et al.
patent: 6448910 (2002-09-01), Lu
patent: 7035356 (2006-04-01), Langhammer
patent: 2002/0106033 (2002-08-01), Uesugi
patent: 2003/0123579 (2003-07-01), Safavi et al.

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