Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2002-12-17
2004-12-14
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
Reexamination Certificate
active
06830941
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor process failure analysis, and more particularly to a method and apparatus for identifying individual die during failure analysis.
BACKGROUND OF THE INVENTION
A semiconductor wafer is the base material used in chip making, which goes through a series of photomasking, etching, and implantation steps to produce die or chips containing integrated circuits. Individual wafers are sliced from a cylindrical silicon crystal that is generally 8 to 12 inches in diameter.
The wafers sliced from the crystal as a lot (e.g., 25 wafers) and are assigned a wafer lot number or ID. The wafer lot ID is then typically scribed on the surface of each wafer. In addition to, or as an alternative to the lot ID, each wafer may also be assigned a wafer ID. For tracking purposes, the lot ID and/or the wafer ID may be stored in a work stream database along with the materials, suppliers, vendors, and process history including specifications, recipes, equipments, operators and times used to manufacture the wafer and/or the wafer lot.
After the chip making process, a single wafer may contain hundreds or even thousands of die. Each die is cut out of the wafer and then packaged. During packaging, die from different wafers may be assembled at the same batch of the jobs and then box stocked together. Normally, it is of little concern which wafer a die originated from.
But for technology qualification and failure analysis testing, it is important to track the history of the die in order to trace the origins of problems and faults that may develop during fabrication. The problem is that given a package for testing, there is no current method for determining which wafer a given die originated from and from which die location, usually represented by die x/y coordinates, of that wafer. In addition, the lot ID and/or the wafer ID is also lost when the die are cut from the wafer.
Accordingly, what is needed is a method for tying each die to the history of materials and processes associated with the originating wafer. The present invention addresses such a need.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for identifying individual semiconductor die that originate from a semiconductor substrate containing a plurality of die. Aspects of the invention include physically associating a respective die ID with at least a portion of individual die on the wafer, and storing the die ID and wafer fabrication information in a database. During subsequent testing of the die, the die ID is used to retrieve the wafer fabrication information from the database, thereby aiding a determination as to a cause of a failure of the die.
REFERENCES:
patent: 6087845 (2000-07-01), Wood et al.
patent: 6365421 (2002-04-01), Debenham et al.
patent: 6625497 (2003-09-01), Fairbairn et al.
patent: 6640151 (2003-10-01), Somekh et al.
patent: 6645684 (2003-11-01), Atkinson et al.
patent: 6710284 (2004-03-01), Farnworth et al.
patent: 6727106 (2004-04-01), Ankutse et al.
Ang Boon Y.
Lee Chern-Jiann
Lin David
Mahanpour Mehrdad
Luk Olivia
Niebling John F.
LandOfFree
Method and apparatus for identifying individual die during... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for identifying individual die during..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for identifying individual die during... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3307664