Method and apparatus for high performance switch mode...

Details Method and apparatus for high performance switch mode... Method and apparatus for high performance switch mode...

2007-10-12

2010-10-05

Berhane, Adolf (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S283000, C327S543000

Reexamination Certificate

active

07808222

ABSTRACT:
A circuit configuration for a high power switch-mode voltage regulator circuit is disclosed that includes an array of Metal Oxide Semiconductor (MOS) switching transistors electrically coupled to one another at their drains and sources, and a plurality of gate driver circuits. Each gate driver circuit is coupled substantially close to the gate and dedicated to driving only one MOS switching transistor.

REFERENCES:
patent: 4797579 (1989-01-01), Lewis
patent: 5214320 (1993-05-01), Truong
patent: 5455502 (1995-10-01), Kato et al.
patent: 5627460 (1997-05-01), Bazinet et al.
patent: 5757717 (1998-05-01), Kondou et al.
patent: 6255867 (2001-07-01), Chen
patent: 6437611 (2002-08-01), Hsiao et al.
patent: 6627951 (2003-09-01), Hshieh et al.
patent: 6878996 (2005-04-01), Rothleitner
patent: 7119508 (2006-10-01), Kurosawa et al.
patent: 7230406 (2007-06-01), Huang et al.

Affiliated with

Also associated with

Rating

Method and apparatus for high performance switch mode... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for high performance switch mode..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for high performance switch mode... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4242131