Electricity: battery or capacitor charging or discharging – Diverse charging or discharging rates for plural batteries
Reexamination Certificate
1998-11-04
2001-05-01
Wong, Peter S. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Diverse charging or discharging rates for plural batteries
C323S280000
Reexamination Certificate
active
06225782
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to battery chargers, and in particular, to a battery charger controller capable of charging secondary batteries that have been deeply discharged as low as 0V.
2. Discussion of the Related Art
In a battery charging system, a current control (CC) circuit and a voltage control (VC) circuit work in sequence to recharge a discharged battery. During bulk charging operation, the CC circuit provides a constant rapid-charge current to rapidly charge the battery until a final target voltage is reached. At that point, the charging system switches to maintenance operation as the VC circuit takes over to maintain the battery voltage at the final target voltage. The rapid-charge current applied by the CC circuit provides the maximum battery charging rate and reduces the overall recharging cycle time. However, a deeply discharged battery having a voltage below a minimum specified threshold voltage cannot accept the high rapid-charge current without risk of storage capacity degradation. The recommended method for charging a deeply discharged battery is to recharge at a reduced rate by providing a lower conditioning current until the battery voltage is above the minimum threshold voltage. This type of charging is referred to as hi-Z mode charging or battery conditioning charging.
In a conventional battery charging system with hi-Z charging capability, the conditioning current control is provided by a modified CC circuit. A conventional scheme for providing hi-Z charging is depicted in
FIG. 1. A
power source
101
, controlled by a CC circuit
103
and a VC circuit
104
, provides a charging voltage Vs to a battery
105
. During bulk charging operation, CC circuit
103
monitors a charge current Ibatt flowing through battery
105
and maintains it at a rapid-charge current Imax. When a voltage Vbatt, measured across battery
105
by a differential amplifier
106
, reaches a final target voltage Vfinal, VC circuit
104
maintains voltage Vbatt at voltage Vfinal. An output driver circuit
102
determines whether CC circuit
103
or VC circuit
104
has control of the battery charging system, and sends the appropriate control signal Vc to power source
101
. CC circuit
103
includes a reference voltage generator
108
and an error amplifier
109
. During bulk charging operation, reference voltage generator
108
produces a voltage Vref equal to a voltage Vrefa. Voltage Vrefa is defined by the formula:
Vrefa=Imax*R
114
where R114 is the resistance of a monitoring resistor
114
. Therefore, as it attempts to keep its inputs equal, error amplifier
109
maintains a constant current Imax flowing through battery
105
. However, if voltage Vbatt is less than a minimum voltage Vmin, current Imax can permanently degrade the storage capacity of battery
105
, so hi-Z mode charging must be performed. A hi-Z control circuit
107
detects when hi-Z charging is required and ensures that proper charging takes place. An embodiment of hi-Z control circuit
107
includes comparators
110
and
111
, an AND gate
112
, and a fault circuit
113
. Comparator
110
compares voltage Vbatt to a reference voltage Vlco. Voltage Vlco is the minimum battery voltage at which the charging system can properly function. If voltage Vbatt is less than voltage Vlco, comparator
110
generates a logic LOW output signal, causing fault circuit
113
to assert a Vfault signal to prevent any charging operation. While voltage Vbatt is greater than voltage Vlco but less than voltage Vmin, comparator
110
outputs a logic HIGH signal while comparator
111
asserts a logic LOW signal. As a result, AND gate
112
sends a logic LOW signal to reference voltage generator
108
, which generates a voltage Vrefb as its output voltage. Voltage Vrefb is defined by the formula:
Vrefb=Icond*R
114
where Icond is a conditioning current required for proper hi-Z charging of battery
105
. Thus, while Vbatt is less than Vmin, error amplifier
109
forces voltage Vs lower and lower until current Ibatt equals current Icond. When voltage Vbatt reaches voltage Vmin, the output of comparator
111
swings to a logic HIGH stage, bringing the output of AND gate
112
HIGH. This in turn switches the output of reference voltage generator
108
back to voltage Vrefa, which raises the charge current to Imax and begins bulk charging operation.
Due to the control system used in the aforementioned hi-Z charging circuit, a battery that has been discharged below voltage Vlco cannot be recharged. Such a deeply discharged battery begins to approximate a short circuit, and cannot be properly handled by conventional charging systems.
While some charging systems have overcome the limitation of recharging a deeply discharged battery, these charging systems have other shortcomings. An example of this type of charging system is battery charging IC's bq2031 and bq2054 from Benchmarq, which provide hi-Z charging for lead-acid and lithium-ion batteries, respectively. While these battery chargers allow charging of deeply discharged battery, these systems require a separate power supply to power the charger circuitry. The need for a separate power supply arises because hi-Z charging is provided by the reduction of source voltage Vs until current Ibatt drops to current Icond. During hi-Z charging operation, voltage Vs will fall below a rated operating supply voltage required by other charger circuits, such as circuits
102
,
103
,
104
,
106
, and
107
in FIG.
1
. Therefore, an independent, fixed voltage source must be used to provide the rated operating supply voltage for these charger circuits.
Accordingly, it is desirable to provide a hi-Z charging control circuit that is capable of charging a battery having a voltage as low as 0 V and does not require a separate supply voltage for related circuitry.
SUMMARY OF THE INVENTION
The present invention provides, in a battery charging system including a current control (CC) circuit and a voltage control (VC) circuit, a load simulator circuit for charging a battery that has been discharged below a minimum voltage level, without requiring an additional supply voltage for the battery charging system. According to the present invention, the load simulator circuit provides a charging load resistance during hi-Z charging. In an embodiment of the present invention, the load simulator circuit includes a FET connected in series with the battery. By appropriately biasing the FET, a desired effective resistance is achieved so that the voltage across the battery and the FET is maintained at a constant level. The CC circuit maintains a constant conditional charge current by controlling the biasing of the FET. Meanwhile, the VC circuit maintains a constant charging voltage across the battery and the FET. The charging voltage is maintained at a voltage level greater than the battery voltage and therefore, the charging voltage can be used as supply voltage for other charger circuitry.
In another embodiment of the present invention, a high-Z control circuit is provided to control the CC and VC circuits in the high-Z charge mode. In one embodiment, the high-Z control circuit includes a voltage monitor to detect when the battery voltage is less than the minimum voltage level and a logic circuit to control the CC and VC circuits to provide proper hi-Z mode charging. Another embodiment of the present invention further includes a first reference voltage generator in the CC circuit and a second reference voltage generator in the VC circuit. The first and second reference voltage generators are controlled by the high-Z control circuit, and provide the predetermined reference voltages during hi-Z charging in order to make the CC and VC circuits provide a constant conditioning current.
The present invention will be better understood upon consideration of the accompanying drawings and the detailed description below.
REFERENCES:
patent: 3816807 (1974-06-01), Taylor
patent: 5369364 (1994-11-01), Renirie et al.
patent: 5548205 (1996-08-01), Monticelli
paten
Mercer Mark J.
Shacter Stuart B.
Cook Carmen C.
Kwok Edward C.
Luk Lawrence
National Semiconductor Corporation
Skjerven Morrill & MacPherson LLP
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