Patent
1996-11-25
1999-03-09
Ellis, Richard L.
395385, 395568, G06F 9318
Patent
active
058812792
ABSTRACT:
A microprocessor that handles invalid opcodes via an event-signaling micro-operation is disclosed. The microprocessor comprises a decoder that decodes macroinstructions, including an opcode, into a single microprocessor cycle micro-operation. The decoder detects invalid opcodes and replaces the invalid opcodes with an event-signaling micro-operation that triggers an invalid opcode assist. The invalid opcode assist triggers an invalid opcode exception handler that processes the invalid opcode.
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Grochowski Ed
Kosaraju Charkravaythy
Lin Derrick Chu
Modi Nimish
Yellamilli Champa R.
Ellis Richard L.
Intel Corporation
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