Method and apparatus for handling invalid opcode faults via exec

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395385, 395568, G06F 9318

Patent

active

058812792

ABSTRACT:
A microprocessor that handles invalid opcodes via an event-signaling micro-operation is disclosed. The microprocessor comprises a decoder that decodes macroinstructions, including an opcode, into a single microprocessor cycle micro-operation. The decoder detects invalid opcodes and replaces the invalid opcodes with an event-signaling micro-operation that triggers an invalid opcode assist. The invalid opcode assist triggers an invalid opcode exception handler that processes the invalid opcode.

REFERENCES:
patent: 3711692 (1973-01-01), Batcher
patent: 3723715 (1973-03-01), Chen et al.
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4167778 (1979-09-01), Sipple
patent: 4393468 (1983-07-01), New
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4418383 (1983-11-01), Doyle et al.
patent: 4498177 (1985-02-01), Larson
patent: 4707800 (1987-11-01), Montrone et al.
patent: 4771379 (1988-09-01), Ando et al.
patent: 4989168 (1991-01-01), Kuroda et al.
patent: 5095457 (1992-03-01), Jeong
patent: 5187679 (1993-02-01), Vassiliadis et al.
patent: 5235686 (1993-08-01), Bosshart
patent: 5479616 (1995-12-01), Garibay, Jr. et al.
patent: 5619408 (1997-04-01), Black et al.
patent: 5625788 (1997-04-01), Boggs et al.
patent: 5632028 (1997-05-01), Thusoo et al.
J. Shipnes, Graphics Processing with the 88110 RISC Microprocessor, IEEE (1992), pp. 169-174.
MC88110 Second Generation RISC Microprocessor User's Manual, Motorola Inc. (1991).
Errata to MC88110 Second Generation RISC Microprocessor User's Manual, Motorola Inc. (1992), pp. 1-11.
MC88110 Programmer's Reference Guide, Motorola Inc. (1992), pp. 1-4.
i860.TM. Microprocessor Family Programmer's Reference Manual, Intel Corporation (1992), Ch. 1, 3, 8, 12.
R. B. Lee, Accelerating Multimedia With Enhanced Microprocessors, IEEE Micro (Apr. 1995), pp. 22-32.
TMS320C2x User's Guide, Texas Instruments (1993) pp. 3-2 through 3-11; 3-28 through 3-34; 4-1 through 4-22; 4-41; 4-103; 4-119 through 4-120; 4-122; 4-150 through 4-151.
L. Gwennap, New PA-RISC Processor Decodes MPEG Video, Microprocessor Report (Jan. 1994), pp. 16, 17.
Sparc Technology Business, UltraSparc Multimedia Capabilities On-Chip Support for Real-Time Video and Advanced Graphics, Sun Microsystems (Sep. 1994).
Y. Kawakami et al., LSI Applications: A Single-Chip Digital Signal Processor for Voiceband Applications, Solid State Circuits Conference, Digest of Technical Papers; IEEE International (1980).
B. Case, Philips Hopes to Displace DSPs with VLIW, Microprocessor Report (Dec. 1994), pp. 12-15.
L. Gwennap, UltraSparc Adds Multimedia Instructions, Microprocessor Report (Dec. 1994), pp. 16-18.
N. Margulis, i860 Microprocessor Architecture, McGraw Hill, Inc. (1990) Ch. 6, 7, 8, 10, 11.
Pentium Processor User's Manual, vol. 3: Architecture and Programming Manual, Intel Corporation (1993), Ch. 1, 3, 4, 6, 8, and 18.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for handling invalid opcode faults via exec does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for handling invalid opcode faults via exec, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for handling invalid opcode faults via exec will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1331096

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.