Method and apparatus for handling code segment violations in a c

Details Method and apparatus for handling code segment violations in a c Method and apparatus for handling code segment violations in a c

1995-10-18

1998-01-13

Donaghue, Larry D.

395394, 395566, G06F 938, G06F 9312

Patent

active

057088438

ABSTRACT:
A memory operation is issued in a processor. Upon detecting both that the memory operation produces a code segment violation and that the memory operation is blocked at retirement, a blocking signal is produced to block a bus access responsive to the memory operation. A second signal signifies that the memory operation completed.

REFERENCES:
patent: 5463745 (1995-10-01), Vidwans et al.
patent: 5574935 (1996-11-01), Vidwans et al.
patent: 5623428 (1997-04-01), Kunii et al.
"The Metaflow Architecture", pp. 10--13 and 63--73, by Val Popescu, Merle Schultz, John Spracklen, Gary Gibson, Bruce Lightner, and David Isaman, IEEE Micro, 1991.
Superscalar Microprocessor Design, by M. Johnson, Prentice Hall (1991).

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