Method and apparatus for generating variable rate...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Details

C348S524000

Reexamination Certificate

active

06310922

ABSTRACT:

The present invention is related to the generation of synchronizing signals having different frequencies, a particular example of which provides different frame synchronization rates for display of the different modes of video signal conveyed in MPEG compressed form. MPEG herein refers to compression standards sponsored by the Motion Picture Experts Group of the International Standardization Organization or ISO.
BACKGROUND OF THE INVENTION
The invention will be described in the environment of an MPEG video signal receiver, but should not be considered to be limited to either the use with video signals or to MPEG signal processing systems.
The MPEG standards for compressed video signal are extremely flexible in that video signals having different display modes may be compressed and transmitted. For example, source signals of different respective frame rates may be compressed and compatible receivers are expected to be capable of reproducing and displaying the respective signal at the appropriate frame rate. In particular, the Grand Alliance High Definition Television system currently undergoing examination by the FCC, accommodates MPEG compressed video signals having frame rates of 29.97002997 . . . Hz or 30.000000 Hz. The compressed signal includes a data field indicating the frame rate of the received signal, and Grand Alliance compliant receivers, responsive to this data field are adaptively re configured to display the received signal at the indicated frame rate.
System level MPEG compressed signal incorporates synchronization signals in the form of time stamps. These time stamps are referenced to a video signal compressor system clock signal of 27 MHz. One of these time stamps, designated the Presentation Time Stamp or PTS, occurs in the video level of compressed signal, is synchronized with the occurrence of frames of the source signal being compressed, and is determinative of the precise time a decompressed frame is to be displayed by respective receivers. A second time stamp, designated the System Clock Reference or SCR is incorporated in the system level of the compressed signal. At the system level, the compressed video signal is segmented into discreet packets. SCR's are included in ones of these packets, which SCR's are indicative of the precise time the associated packet is formed/transmitted. The SCR's are utilized by respective receivers to synchronize a system clock in the receiver to the system clock in the compression apparatus.
Synchronization of the receiver system clock to the compression apparatus system clock minimizes the amount of memory required in respective receivers to rate buffer the received signal. The receiver system clock is nominally utilized by the decompression apparatus for decoding the compressed signal. Since the receiver system clock is synchronous with the compression apparatus system clock, to which the PTS's are referenced, the display of the decoded signals may also be timed via the receiver system clock. However, there are disadvantages in using a signal clock reference in broadcast signal receivers. For example, not infrequently transmitted data may be lost or corrupted, and error concealment processes must be performed on the decompressed signal. These processes tend to disrupt the normal flow of decoded data, and possibly prevent normal display of frames in accordance with associated PTS's. Also, various display features, such as freeze frame, may be implemented, which disrupt the appropriate association of PTS's with the system clock.
SUMMARY OF THE INVENTION
The present invention includes a programmable synchronizing system for selectively providing synchronizing signals at different rates. In a particular embodiment the programmable synchronizing system is incorporated in a video signal decompression system having a first synchronizing system for developing a system clock signal and a second synchronizing system for providing video signal display synchronization signals. In a specific embodiment, a synchronizing system for selectably providing synchronizing signals at different rates, includes an oscillator and a programmable counter. The programmable counter is conditioned to alternately count pulses from the oscillator by first and second divisors to generate the synchronizing signals. The desired synchronization rate is effectively the average of the counter output resulting from counting by the alternate divisors.


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