Method and apparatus for generating super-orthogonal convolution

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G06F 1108

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051930943

ABSTRACT:
An encoder and decoder for generating and decoding convolutional codes of enhanced orthogonality. In an exemplary embodiment the encoder includes a K bit length shift register for receiving an input serial stream of information bits and providing for each input bit a K bit parallel output to an orthogonal code sequence generator where one of 2.sup.K-1 symbol sequences is generated with each symbol sequence of a K-2 symbol length. The encoded symbol stream is decoded using an orthogonal function generator driven by a K-2 binary counter to generate all possible symbol sequences for comparison with each received symbol sequence. The output of the comparison is Viterbi decoded to provide the original stream of information bits. Corresponding methods of encoding the information bits and decoding of the symbol sequences are included.

REFERENCES:
patent: 3697947 (1972-10-01), Macy
patent: 4128828 (1978-12-01), Samejima et al.
patent: 4395768 (1983-07-01), Goethols et al.
patent: 4761778 (1988-08-01), Hui

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