Method and apparatus for generating four phase non-over lapping

Details Method and apparatus for generating four phase non-over lapping Method and apparatus for generating four phase non-over lapping

1996-12-18

1997-11-25

Heckler, Thomas M.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Converting, per se, of an ac input to corresponding dc at an...

327296, 327536, G06F 106

Patent

active

056921640

ABSTRACT:
A clock generation circuit which includes a first circuit for generating first and second trains of non-overlapping and opposite phase clock pulses from an input train of clock pulses, and second and third circuits each for generating a pair of non-overlapping and opposite phase trains of clock pulses from one of the first or second trains of opposite phase clock pulses provided by the first circuit.

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Umezawa et al, "A 5-V-Only Operation 0.6-um. Flash EEPROM with Row Decoder Scheme in Triple-Well Structure," IEEE Journal of Solid State Circuits, vol. 27, No. 11, Nov. 1992. pp. 1540-1545.
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