Computer graphics processing and selective visual display system – Computer graphic processing system – Graphic command processing
Reexamination Certificate
1999-11-30
2002-09-17
Tung, Kee M. (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphic processing system
Graphic command processing
C345S559000, C703S023000
Reexamination Certificate
active
06452599
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to computers and more particularly to software exception handlers that emulate the functionality of a computer hardware component.
BACKGROUND OF THE INVENTION
FIG. 1
illustrates a schematic block diagram of a computing system
10
that includes a central processing unit
12
, a north bridge
14
, a south bridge
16
, system memory
18
, and a video graphics processing module
20
. The central processing unit
12
is shown to include a video graphics accelerator (VGA) in/out instruction register
22
. Such a register stores the VGA input/output instructions for various combinations of VGA formatting, presentation, etc. Typically, the register will include a plurality of locations for storing up to 50 bits of information per in/out instruction. Accordingly, with such a large number of bits per instruction, the number of VGA display variations is substantial.
The video graphics processing module
20
includes a VGA card
26
and a frame buffer
24
. The VGA card is used only during boot up to provide a video image while a Windows™ operating system is being installed. Because each DOS based computer uses the VGA card for this limited application, every computer must include such functionality. In addition, the complexity of the VGA card is quite substantial since the type of video image being generated corresponds to the particular in/out instruction stored in register
22
. Accordingly, a fair amount of hardware is required in the VGA card
26
to accommodate the substantial number of VGA formats.
FIG. 2
illustrates the same computing system
10
as in
FIG. 1
with the exception that the VGA card
26
has been removed from the video graphics processing module
20
. In this embodiment of the computing system
10
, the system memory
18
includes software for a video graphics exception handler
28
. As such, when the VGA card
26
is to be accessed, the central processing unit
12
performs the VGA exception handler software
28
to emulate the VGA card. In essence, the VGA exception handler software
28
allows the central processing unit to simulate a DOS box (i.e., a 640×480 VGA screen) to perform the same function as the VGA card. The VGA emulation is shown in greater detail with reference to FIG.
3
.
FIG. 3
illustrates the processing performed by the VGA exception handler software
28
. In essence, the VGA exception handler software
28
includes data processing software
36
and address processing software
38
. In operation, the VGA exception handler software
28
receives a data word
30
from the central processing unit. The data word
30
includes addressing information
32
and data
34
. Based on the format selected via the VGA input/output instruction register
22
, the VGA exception handler processes the data
34
via the data processing software
36
and processes the address information
32
via the addressing processing software
38
. In essence, the VGA exception handler
28
indicates, based on the format selected from register
22
, what the data is to look like and where the manipulated data
40
is to be stored in the frame buffer.
As shown, the manipulated data
40
is stored at a particular targeted address
42
within frame buffer
24
. The manipulated data may be any one of a plurality of types of formats including, for example, a 16 bit word that identifies an 8×8 pixel block for a character and its corresponding attributes, four bytes per pixel scan line information, eight bit per pixel per scan line, 16 one bit pixels, etc.
The in/out instructions provided to the VGA register
22
may be performed by a software exception handler executed by the central processing unit. As such, the particular formats, in accordance with the I/O instructions are recorded in register
22
as the central processing unit emulates such instructions.
Each time the central processing unit supplies a data word for VGA operation, the exception handler
28
performs the above-described process. As one can image, with such a substantial number of potential formats, the VGA exception handler software
28
needs to include routines to handle each of the potential VGA formats. As such, the software
28
is substantial in size and is relatively slow.
Therefore, a need exists for a method and apparatus that allows for generating a specific computer hardware component exception handler that improves the speed of performance.
REFERENCES:
patent: 5560013 (1996-09-01), Scalzi et al.
patent: 5577232 (1996-11-01), Priem et al.
patent: 5970237 (1999-10-01), Nagaraj et al.
patent: 6009261 (1999-12-01), Scalzi et al.
patent: 6115054 (2000-09-01), Giles
ATI International SRL
Tung Kee M.
Vedder Price Kaufman & Kammholz
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