Method and apparatus for gain control in a CMOS low noise...

Details Method and apparatus for gain control in a CMOS low noise... Method and apparatus for gain control in a CMOS low noise...

2002-11-20

2004-08-31

Shingleton, Michael B. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

C330S265000, C330S267000, C330S268000, C330S272000, C330S273000

Reexamination Certificate

active

06784738

ABSTRACT:

TECHNICAL FIELD
This invention relates to Complementary Metal Oxide Semiconductor (CMOS) low noise amplifiers (LNA).
BACKGROUND
One of the key building blocks of a conventional RF transceiver is a Low Noise Amplifier (LNA).
FIG. 1
shows an implementation of a CMOS LNA high gain path
200
commonly adopted in conventional RF transceivers. The gain of this amplifier can be expressed as:
A
v
=g
m
·Q
2
·R
p
where gm is the transconductance of the input device, Q is the quality factor of the load inductor and R
p
is the parasitic resistance associated with the inductor.
Referring to the equation above, the gain is a strong function of gm of the input transistor, as well as the Q of the inductor of the LNA. gm may vary +/−30-40%, and the Q
2
R
p
term typically varies +/−10-20% due to process, temperature etc. variation. As a result, the gain of the LNA can easily vary by greater than 6 dB. This gain variation may affect receiver performance significantly in real life applications and hence, the implementation may not be desirable.
SUMMARY
An amplifier comprising a Low Noise Amplifier (LNA) to amplify a Radio Frequency (RF) signal. The gain of the LNA varying as a function of changes in the process and environmental conditions. A bias assembly to generate a bias current to bias the LNA input stage. The bias assembly configured to reduce the variation of the LNA gain due to changes in process variations and environmental conditions.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.


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U.S. Ser. No. 10/379,116, filed Mar. 4, 2003, entitled, “Calibration Circuit”, pp. 1-37 and 3 sheets if drawings. Attorney Docket No. MP0040.D1.
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