Method and apparatus for forming multi-layered circuit pattern

Details Method and apparatus for forming multi-layered circuit pattern Method and apparatus for forming multi-layered circuit pattern

2006-06-06

2010-11-09

Cleveland, Michael (Department: 1792)

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

Reexamination Certificate

active

07829135

ABSTRACT:
In the process of forming, on a substrate, a multi-layered circuit pattern with layers each having a portion made of the same material throughout the different layers in the direction in which the different layers are stacked, the position of nozzles with respect to the substrate when at least one of the layers is formed is shifted from that when the other layers are formed.

REFERENCES:
patent: 5438167 (1995-08-01), McClanahan
patent: 6503831 (2003-01-01), Speakman
patent: 6660332 (2003-12-01), Kawase
patent: 2003/0227509 (2003-12-01), Usuda
patent: 2004/0000429 (2004-01-01), Furusawa et al.
patent: 09-018116 (1997-01-01), None
patent: 11-163499 (1999-06-01), None
patent: 2002-221616 (2002-08-01), None
patent: 2004-105948 (2004-04-01), None
patent: 2004-320003 (2004-11-01), None

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