Method and apparatus for forming layout pattern of semiconductor

Details Method and apparatus for forming layout pattern of semiconductor Method and apparatus for forming layout pattern of semiconductor

1988-11-08

1993-09-21

Trans, Vincent N.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1560

Patent

active

052474569

ABSTRACT:
A method and an apparatus is provided for forming a layout pattern of a semiconductor integrated circuit comprising automatically reforming a layout pattern by only carrying out a routing process, when a required layout pattern is the same as an existing layout pattern at the transistor-constitution level. Further, a method or an apparatus is provided for forming a layout pattern of a semiconductor integrated circuit comprising automatically reforming a layout pattern without analyzing the logical information down to the transistor-constitution level, when a required layout pattern is not the same as an existing layout pattern in the transistor-constitution level. Therefore, processing can be simplified and operation speed can be increased.

REFERENCES:
patent: 4580228 (1986-04-01), Noto
patent: 4613940 (1986-09-01), Shenton et al.
patent: 4630219 (1986-12-01), DiGiacomo et al.
patent: 4636965 (1987-01-01), Smith et al.
patent: 4644187 (1987-02-01), Haji
patent: 4651284 (1987-03-01), Watanabe et al.
patent: 4703435 (1987-10-01), Darringer et al.
patent: 4744047 (1988-05-01), Okamoto et al.
patent: 4745084 (1988-05-01), Rowson et al.
patent: 4829446 (1989-05-01), Draney
Proceedings of the IEE 1985 Custom Integrated Circuits Conf. Portland, Oreg., May 20-23, 1985, pp. 267-271, IEEE N.Y. K. Nagao et al.: "Super integration".
European Search Report dated Mar. 27, 1991.

Affiliated with

Also associated with

Rating

Method and apparatus for forming layout pattern of semiconductor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for forming layout pattern of semiconductor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for forming layout pattern of semiconductor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1055385