Method and apparatus for floating point operations and...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Details

C708S495000

Reexamination Certificate

active

06282554

ABSTRACT:

FIELD OF THE INVENTION
The present invention is in the field of computer operations on numbers in binary formats, including conversions between formats.
BACKGROUND OF THE INVENTION
In some computer applications, the required range of numbers is very large. While it is possible to represent such numbers as multibyte integers or multibyte fractions, the memory required for storage is excessive. Also, when the number of significant bits required is small, the use of a multibyte representation is wasteful of memory. In addition, most very large or very small numbers do not require the precision of a multibyte representation. A more efficient representation of very large or very small decimal numbers is floating point notation or format. In digital systems, floating point format is the counterpart of scientific notation. Floating point is useful for performing operations that require many precise calculations, such as operations in a graphics application.
FIG. 1
shows base
2
representations of the number
6
in both floating point and integer formats. Number
106
is a base
2
floating point representation of the number
6
. Number
108
is an integer base
2
representation of the number
6
. Numbers in floating point format are always aligned on the left, that is, they are always normalized so that only one, non-zero number appears to the left of the decimal point as in number
106
. Integer representations, on the other hand, are aligned on the right, that is, the decimal point appears as far to the right as possible to represent the number without multiplication by a number represented by the base raised to a power. Steps
110
and
112
show how floating point number
106
is converted to the base
10
integer “6”. Steps
114
and
116
show how integer
108
is converted to the base
10
integer “6”.
Processors that perform floating point operations typically include special floating point circuitry to perform operations such as addition, subtraction, etc. Because it is not necessary or efficient for floating point numbers to be used for every application that may be executed on a processor, processors have the capability of performing operations using either floating point numbers or integer numbers. Conversions between the two formats are therefore often required. As seen by a comparison of number
106
with number
108
, conversion between floating point and integer formats involves shifting the decimal point to the right or left. Floating point arithmetic units in typical processors include shift circuits. For example, a multiplication operation is equal to a shift of one bit position for every multiplication by 2. Preferably, existing floating point arithmetic circuitry could be used for both performing floating point arithmetic operations and converting operands between floating point and integer formats. This is not a straightforward process, however, because the number of significant bits for a floating point format is not the same as the number of significant bits for a corresponding integer format. For instance, an integer format that includes 32 significant bits converts to a floating point format with a 23-bit mantissa.
In some processors, the data path provided in the floating point arithmetic unit to process floating point numbers during processing is not adequate to perform conversions between floating point and integer formats. For example, a floating point arithmetic unit that is designed to most economically perform operations on single precision floating point numbers does not have the required data width to perform conversions. This is because the shift right or left of the floating point required by the conversion may be so large as to shift bits outside of the available data path.
SUMMARY OF THE INVENTION
A floating point arithmetic apparatus for converting numbers between an integer format and a floating point format, wherein a conversion operation requires a greater data path width than a arithmetic operation. The apparatus comprises right shift circuitry that receives a number in the floating point format, wherein the right shift circuitry includes additional register positions to accommodate a shift beyond a data path width required by an arithmetic operation.


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