Boots – shoes – and leggings
Patent
1985-12-19
1988-08-09
Harkcom, Gary V.
Boots, shoes, and leggings
364200, G06F 738
Patent
active
047632941
ABSTRACT:
An information processing system having a memory for storing instructions and operands, a central processor unit which includes a mechanism for fetching and decoding instructions and operands and a bus connected between the processor unit and memory. An associated floating point unit is coupled to the bus and is responsive to floating point instructions for performing floating point operations. The floating point unit and the central processing unit may perform operations independently of the other or may be synchronized to one another, depending upon the type of instruction. A floating point instruction is determined to be a member of a first group of instructions requiring interlock of operation between the central processor unit and the floating point unit or is determined to be a member of a second group of instructions not requiring interlock of operation. The central processor unit is responsive to the occurrence of an instruction of the first group and to an idle state in the floating point unit for dispatching an instruction of the first group to the floating point unit for execution and is responsive to the occurrence of an instruction of the second group and an available state in the floating point unit for dispatching an instruction of the second group.
REFERENCES:
patent: 3871578 (1975-03-01), Van de Goor et al.
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4229801 (1980-10-01), Whipple
patent: 4589067 (1986-05-01), Porter et al.
patent: 4612628 (1986-09-01), Beauchamp et al.
patent: 4654785 (1987-03-01), Nishiyama et al.
Harkcom Gary V.
Nelson Gordon E.
Nguyen Long Thanh
Shanahan Michael H.
Wang Laboratories, Inc.
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