Method and apparatus for filtering invalidate requests

Details Method and apparatus for filtering invalidate requests Method and apparatus for filtering invalidate requests

1988-06-27

1991-10-15

Lee, Thomas C.

Boots, shoes, and leggings

3642281, 36424344, 3642464, 3642663, 36493146, 3649456, 36496432, G06F 1338

Patent

active

050580060

ABSTRACT:
An apparatus which filters the number of invalidates to be propagated onto a private processor bus is provided. This is desirable so that the processor bus is not overloaded with invalidate requests. The present invention describes a method of filtering the number of invalidates to be propagated to each processor. A memory interface filters the invalidates by using a second private bus, the invalidate bus, which communicates with the cache controller. The cache controller can tell the memory interface whether data corresponding to the address on the invalidate bus is resident in the private cache memory of that processor. In this way, the memory interface only has to request the private processor bus when necessary, in order to perform the invalidate.

REFERENCES:
patent: 4142234 (1979-02-01), Bean
patent: 4445174 (1984-04-01), Fletcher
patent: 4493026 (1985-01-01), Olnowich
patent: 4562536 (1985-12-01), Keeley et al.
patent: 4736293 (1988-04-01), Patrick
patent: 4814981 (1989-03-01), Robinfield

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