Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2006-02-21
2006-02-21
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S099000, C438S637000, C257S040000, C257S295000
Reexamination Certificate
active
07001782
ABSTRACT:
Some embodiments for a method to fill interlayer vias with a suitable metal in a ferroelectric polymer memory die to reduce the step height and improve the thermal and electrical properties of the via. The method uses an electroless plating method to fill the vias, which is compatible with the ferroelectric polymer memory die processing temperature limits. The resulting process produces via fill metal plugs in the ferroelectric memory die, which allows for the deposition of a thin metal layer over the vias, while at the same time improving the electrical and thermal properties of the vias. Other embodiments are described and claimed herein.
REFERENCES:
patent: 6670659 (2003-12-01), Gudesen et al.
patent: 2002/0197844 (2002-12-01), Johnson et al.
patent: 2003/0017627 (2003-01-01), Li et al.
patent: 2003/0107067 (2003-06-01), Gudesen
patent: 2003/0224535 (2003-12-01), Andideh et al.
Andideh Ebrahim
Diana Daniel C.
Dubin Valery
Fang Ming
Steger Richard M.
Dang Trung
Intel Corporation
Troutman Sanders LLP
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