Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2005-12-13
2005-12-13
Rodriguez, Paul L. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C324S765010, C324S763010, C438S017000, C438S018000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06975978
ABSTRACT:
A test pattern sequence is generated (101), then a logic simulation of the operation of an IC under test in the case of applying each test pattern of the test pattern sequence, and a logic signal value sequence occurring in each signal line of the IC under test (102). The logic signal value sequence in each signal line is used to register in a fault list parts (a logic gate, signal line or signal propagation path) in which a fault (a delay fault or an open fault) detectable by a transient power supply current testing using the test pattern sequence is likely to occur (103).
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Hashimoto Yoshihiro
Ishida Masahiro
Yamaguchi Takahiro
Advantest Corporation
Gallagher & Lathrop
Lathrop, Esq. David N.
Rodriguez Paul L.
Sharon Ayal
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