Method and apparatus for fast checking the frame check sequence

Details Method and apparatus for fast checking the frame check sequence Method and apparatus for fast checking the frame check sequence

1996-11-21

1999-06-15

Ton, Dang

Multiplex communications

Diagnostic testing

Determination of communication parameters

370389, H04J 324

Patent

active

059128810

ABSTRACT:
A process and an apparatus to calculate the FCS (Frame Check Sequence) error checking code of a message sent over a connection and segmented into a finite number of packets in a fixed size packets network. The process is implemented in the adapter cards of the ATM network access nodes (2, 4) located at the boundary of the ATM network. These nodes, when supporting AAL5 type ATM connections, reassemble messages which have been segmented at the entry of the network and to calculate the FCS of the message cell payloads for data integrity checking. The process of the invention starts at each reception of a cell with the calculation of a partial FCS (10) performed in parallel to the connection control block fetching phase (40); these 2 parallel operations allow FCS checking during the cell processing time of connections established over medium and high speed lines.

REFERENCES:
patent: 5742765 (1998-04-01), Wong et al.

Affiliated with

Also associated with

Rating

Method and apparatus for fast checking the frame check sequence does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for fast checking the frame check sequence , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for fast checking the frame check sequence will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-407259