Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation
Patent
1987-08-03
1988-08-30
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Identifying or correcting improper counter operation
377 241, 377 30, 365226, G11C 700, H03K 2140
Patent
active
047682108
ABSTRACT:
A method for the non-volatile storage of the counter reading of a digital counter including storage locations for receiving counter readings and state information of a counting cycle, includes successively storing an actual counter reading in two independent counter reading registers, initially marking one of the registers containing a preceding counter reading, at least up to completion of a counter reading transfer into the other of the registers, subsequently marking the other register, and after a voltage interruption, transferring the counter reading of the marked register into the counter for presetting and selectively incrementing by 1, and an apparatus for carrying out the method.
REFERENCES:
patent: 3987429 (1976-10-01), Manduley et al.
patent: 4049951 (1977-09-01), Baty et al.
patent: 4206996 (1980-06-01), Clark et al.
patent: 4224506 (1980-09-01), Coppola et al.
patent: 4528683 (1985-07-01), Henry
Greenberg Laurence A.
Heyman John S.
Lerner Herbert L.
Siemens Aktiengesellschaft
LandOfFree
Method and apparatus for failsafe storage and reading of a digit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for failsafe storage and reading of a digit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for failsafe storage and reading of a digit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2093441