Semiconductor device manufacturing: process – Making device array and selectively interconnecting – With electrical circuit layout
Reexamination Certificate
2007-12-11
2007-12-11
Everhart, Caridad (Department: 2891)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
With electrical circuit layout
C257SE21575, C438S599000, C716S030000
Reexamination Certificate
active
10651808
ABSTRACT:
Method and apparatus for facilitating signal routing within a programmable logic device having routing resources is described. In an example, the routing resources are formed into groups where, for each of the groups, the routing resources are of a same type. Pairs of the groups are related by an association of at least one routing resource in one group of a pair of groups capable of being electrically connected to at least one other routing resource in another group of the pair of groups.
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Anderson Jason H.
Jayaraman Rajeev
Nag Sudip K.
Rahut Anirban
Verma Vinay
Brush Robert
Everhart Caridad
Xilinx , Inc.
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