Method and apparatus for fabricating semiconductor laser device

Active solid-state devices (e.g. – transistors – solid-state diode – Miscellaneous

Reexamination Certificate

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C438S455000, C438S406000

Reexamination Certificate

active

06867508

ABSTRACT:
After profiles of two chips are recognized on intermediate stages and their positions are corrected, collets are used as electrodes and a voltage is applied to the chips on bonding stage on which the chips are bonded onto a submount. Then, the respective two chips are allowed to emit light, final position correction is performed on the basis of the light-emission point data and bonding is performed. The two chips can be bonded at narrow pitches by tilting the collets with respect to chip surfaces. Consequently, two laser chips can be bonded at narrow pitches on one submount in high position accuracy.

REFERENCES:
patent: 4817849 (1989-04-01), Yamamoto et al.
patent: 63-67793 (1988-03-01), None
patent: 5-335355 (1993-12-01), None
patent: 07-202347 (1995-08-01), None
Japanese Office Action mailed Oct. 28, 2003 in corresponding Japanese application No. 2001-148083.

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