Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Rendering selected devices operable or inoperable
Reexamination Certificate
1999-09-15
2001-12-04
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Rendering selected devices operable or inoperable
C438S132000, C438S238000
Reexamination Certificate
active
06326245
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is directed to the field of manufacturing electronic devices. More specifically, the invention is directed to methods and apparatus used to increase yield during fabrication of electronic devices.
2. Description of Related Art
In order to increase the yield (i.e., the ratio of good devices to the total number of devices available) during the manufacture of electronic devices such as semiconductor integrated circuits, redundant blocks or sections (e.g., memory elements) which are substantially similar in function and/or structure to components on the electronic device are incorporated into the manufactured device. These redundant blocks can be substituted for defective blocks to salvage an otherwise inoperable device. The substitution of these redundant blocks, however, requires overhead circuitry used to test and substitute the redundant blocks. As integrated circuits become more dense, such added circuitry required to access the redundant blocks becomes excessive.
An alternative to the use of such redundant circuitry is known as “discretionary wiring.” According to this concept, a semiconductor wafer
10
(
FIG. 1
) contains small, similar semiconductor devices or clusters of devices
12
which are manufactured using traditional batch processing methods. Before these clusters are interconnected, however, they are tested and a map of good and bad elements
12
on the wafer
10
is created. For each wafer
10
, a set of unique masks for the interconnect patterns (i.e., “discretionary wiring”) is created and metallic conductive strips
18
(
FIG. 2
) are fabricated on the wafer
10
to interconnect all the good elements
12
into a single functional integrated circuit.
A process that employs discretionary wiring by preparing unique masks for the interconnect layer of the semiconductor device is shown in U.S. Pat. Nos. 3,771,217 and 5,691,949. Preparing a unique interconnect pattern using a separate masking step can be a costly and time intensive operation.
SUMMARY OF THE INVENTION
In fabricating electronic devices using discretionary wiring to increase production yield, the invention eliminates the extra manufacturing step of preparing a unique pattern or mask to fabricate the discretionary wiring. Instead, conductive paths interconnecting electronic devices are provided at the same time as the formation of the normal wiring/circuitry of the devices. Thus, by deploying discretionary wiring during the current metalization or formation of other conductive paths during fabrication of integrated circuits, for example, the invention takes advantage of the existing mask steps used to develop the normal integrated circuit elements (e.g., DRAM capacitor, metal lines, etc.).
Logic circuitry formed in street areas between adjacent fabricated electronic devices may be used as auxiliary or redundant components to salvage one or more otherwise defective devices. In accordance with the invention, such logic circuitry is selectively coupled to the defective device(s) so as to directly replace or facilitate the replacement of defective components on one or more fabricated devices, thereby resulting in a single operable electronic device.
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Duesman Kevin G.
Farnworth Warren M.
Wood Alan G.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Estrada Michelle
Fourson George
Micro)n Technology, Inc.
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