Method and apparatus for extracting a predetermined bit pattern

Details Method and apparatus for extracting a predetermined bit pattern Method and apparatus for extracting a predetermined bit pattern

1987-02-12

1988-02-23

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

370105, H04L 708

Patent

active

047275588

ABSTRACT:
An embedded framing bit pattern in a serial bit stream is located using a sliding compare circuit to determine as each bit of the serial bit stream is received if a predetermined number of prior bits of the serial bit stream which are spaced apart by the pitch of the framing bit pattern match part of the framing bit pattern. A candidate register containing one plus the number of bits between each framing bit is initially preset so that all of the bits are at a first logic state and is sequentially addressed as each bit of the serial bit stream is received. If a match does not occur, then the bit addressed in the candidate register is set to a second logic state, but is not disturbed if a match occurs. The framing bit pattern has been located when the candidate register is addressing the only bit position which is still at the first logic state.

REFERENCES:
patent: 4316284 (1982-02-01), Howson
patent: 4347606 (1982-08-01), Hoogeveen
patent: 4622666 (1986-11-01), Graves et al.
patent: 4646328 (1987-02-01), Riou

Affiliated with

Also associated with

Rating

Method and apparatus for extracting a predetermined bit pattern does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for extracting a predetermined bit pattern , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for extracting a predetermined bit pattern will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-606783