Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...
Reexamination Certificate
2005-09-13
2005-09-13
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Byte-word rearranging, bit-field insertion or extraction,...
Reexamination Certificate
active
06944755
ABSTRACT:
A circuit selectively extracts bits from different locations from a source register and loads them in logical order in one side of a destination register. The register is divided into subsets. All of the transfer bits in each subset are arranged on one side and in logical order. These subsets are paired. The bits from one pair are shifted by an amount equal to the non-transfer bits from the other pair and then combined with the bits from the other pair to form a new group of bits that are on one side and are in logical order. The process of shifting bits of one of a pair of groups and combining with the other of the pair continues until all of the transfer bits from the source register are in one group on one side and in logical order.
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patent: 6760837 (2004-07-01), Laurenti et al.
patent: 2002/0161785 (2002-10-01), Dagan et al.
“TMS320C64x Technical Overview,” Texas Instruments Incorporated, pp. iii-v, 1-3 to 1-9, 2-1 to 2-21, A-1 to A-5, B-1 to B-5, C-1 to C-3, D-1 to D-2 (2000).
Gur Amit
Halahmi Dror
Rizi Haim
Buehl Brett
Chan Eddie
Clingan, Jr. James L.
Freescale Semiconductor Inc.
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