Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1996-11-01
2000-10-03
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438711, 438713, 438720, 438734, 216 71, 156345, H01L 21302
Patent
active
061272779
ABSTRACT:
A method and apparatus provide for etching a semiconductor wafer using a two step physical etching and a chemical etching process in order to create vertical sidewalls required for high density DRAMs and FRAMs.
REFERENCES:
patent: 2468174 (1949-04-01), Cotton
patent: 3458817 (1969-07-01), Cooper et al.
patent: 4233109 (1980-11-01), Nishizawa
patent: 4263088 (1981-04-01), Gorin
patent: 4349409 (1982-09-01), Shibayama et al.
patent: 4352725 (1982-10-01), Tsukada
patent: 4399016 (1983-08-01), Tsukada et al.
patent: 4464223 (1984-08-01), Gorin
patent: 4579618 (1986-04-01), Celestino et al.
patent: 4585516 (1986-04-01), Corn et al.
patent: 4889588 (1989-12-01), Fior
patent: 4902377 (1990-02-01), Berglund et al.
patent: 5181132 (1993-01-01), Shindo et al.
patent: 5492855 (1996-02-01), Matsumoto et al.
patent: 5498768 (1996-03-01), Nishitani et al.
patent: 5565036 (1996-10-01), Westendorp et al.
Y. Nishioka, et al., Giga-bit scale dram cell with new simple Ru/(Ba,Sr)Ti) .sub.3 /Ru stacked Capacitors using x-ray lithography, IEDM Tech. Digest, pp. 903-906, 1995.
A. Yuuki, et al., Novel stacked capacitor technology for 1 Gbit drams with CVD-(Ba,Sr)Ti) .sub.3 thin films on a thick storage node of Ru, IEDM Tech. Digest, pp. 115-118, 1995.
W.J. Yoo, et al., Control of the pattern slope in .sub.Ar/C12 /O2 plasmas during etching of Pt, 1995 Dry Process Symposium, The Institute of Electrical Engineers of Japan, pp. 191-194 (1995).
Brochure: The First Low-Pressure High Density Single-Wafer Etch Technology Has a New Name . . . HRe.sub.-, High Density Reflected Electron, Tegal Corporation, 1993.
V.J. Minkiewicz and B.N. Chapman, Triode plasma etching, Appl.Phys.Lett.34(3); Feb. 1979, p. 192-193.
B.N. Chapman, Triode Systems for Plasma Etching, IBM Technical Disclosure Bulletin, vol. 21, No. 12, May 1979, IBM Corp. 1979; pp. 5006-5007.
Cofer Alferd
DeOrnellas Stephen P.
Rajora Paritosh
Goudreau George
Powell William
Tegal Corporation
LandOfFree
Method and apparatus for etching a semiconductor wafer with feat does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for etching a semiconductor wafer with feat, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for etching a semiconductor wafer with feat will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-195032