Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
2001-07-10
2004-04-20
Vinh, Lan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S106000, C438S112000, C438S124000, C438S748000, C438S750000
Reexamination Certificate
active
06723656
ABSTRACT:
TECHNICAL FIELD
The present invention relates to semiconductor die processing, and more particularly to a method and apparatus for etching semiconductor dies.
BACKGROUND
With imaging technologies such as photon emission microscopy and ultrasonic imaging, it is possible to observe semiconductor die construction and failure mechanisms from the inactive, unprocessed, or “back”, side of the semiconductor die. These techniques permit an inspection of the semiconductor die that is not obscured by the metal interconnects typically present on the active, or processed, side of the semiconductor die.
The quality of photon emission microscopy images from the back side of the semiconductor die is generally related to the thickness of the silicon through which the image is taken. The silicon tends to absorb and diffuse light in the imaging range for photon emission microscopy. In ultrasonic imaging, the silicon tends to diffuse the sonic energy. Hence, in general, both photon emission microscopy and ultrasonic imaging techniques tend to produce higher quality images the thinner the silicon. In some applications, it is desirable to thin the semiconductor die to less than about 200 micrometers for p (−) silicon and to less than about 80 micrometers for n (+) silicon. In other applications, it is desirable to thin the die to about 50 micrometers or less.
Mechanical means for thinning semiconductor die tend to be highly time consuming and may damage the semiconductor die during the thinning process. Indeed, mechanical thinning techniques may cause mechanical damage, thermal damage, or both, to the semiconductor die during the thinning process.
Even if the semiconductor die is not broken during the mechanical thinning process, micro-fractures may be formed in the semiconductor die. These micro-fractures may propagate into active areas of the semiconductor die and induce defects therein. The likelihood of semiconductor die damage due to mechanical thinning tends to increase the thinner the semiconductor die.
For packaged semiconductor die where the backside of the semiconductor die is exposed, such as in some “flip-chip” packages, it is possible to thin the semiconductor die using conventional lapping and chemical-mechanical polishing techniques, which tend to be relatively time consuming, and may also damage the semiconductor die.
In circumstances where the semiconductor die is disposed within a plastic package, the backside of the plastic package is conventionally machined to expose the backside of the semiconductor die through a package cavity. This typically requires machining through the plastic encapsulant, the die attach paddle, and the die attach adhesive, such as with a milling tool.
The semiconductor die may alternatively be disposed within a ceramic semiconductor package. Pursuant to this embodiment, a cavity is formed in the ceramic semiconductor package adjacent the inactive surface of the semiconductor die to expose the same through the cavity.
After the backside of the semiconductor die has been exposed through the semiconductor package, a pointed lapping tool may be used to thin the die by grinding and polishing the backside of the semiconductor die within the package cavity.
A need exists for an improved method and apparatus for thinning a semiconductor die. An additional need exists for a method and apparatus for thinning a semiconductor die disposed within a semiconductor package.
SUMMARY
In accordance with one embodiment of the present invention, a semiconductor die is etched by flowing a layer of etchant across an exposed surface of the die from a first edge of the semiconductor die to a second edge of the semiconductor die.
An apparatus is provided for etching a semiconductor die by flowing a layer of etchant over an exposed, inactive surface of the semiconductor die. In one embodiment, the apparatus includes a first member having a support surface for supporting or holding a semiconductor die. The semiconductor die may be disposed within a semiconductor package with the semiconductor package being supported or held by the first member. The apparatus may also include a second member having a first surface disposed adjacent the support surface of the first member such that when a semiconductor die is disposed on the support surface an exposed surface of the semiconductor die is adjacent the first surface of the second member. A channel is formed between the first surface of the second member and the exposed surface of the semiconductor die. An input conduit in fluid communication with one side of the channel provides a supply of etchant to the channel for flowing across the exposed surface of the semiconductor die. In this configuration, etchant passes through the input conduit and across the exposed surface from one edge of the exposed surface to the other to etch the semiconductor die. The semiconductor package is double-sealed within the apparatus to limit leakage of fluid, such as acid, from the apparatus.
Pursuant to one embodiment, in operation, a semiconductor die having an exposed surface is initially provided. Next, a first acidic solution is flowed across the exposed surface to at least partially remove any oxide formed on the exposed surface. The first acidic solution may include hydrofluoric acid. Next, an etchant is flowed across the exposed surface from one edge to the other to etch the semiconductor die. In one embodiment, the etchant comprises a mixture of nitric acid, hydrofluoric acid, and glacial acidic acid. Lastly, a second acidic solution, which may comprise a mixture of hydrofluoric acid and nitric acid, is flowed across the exposed surface of the semiconductor die to at least partially polish the exposed surface of the semiconductor die.
These and other aspects, features, and capabilities of the present invention will be apparent from a reading of the following detailed description and the accompanying drawings.
REFERENCES:
patent: 4359360 (1982-11-01), Harris et al.
patent: 4372803 (1983-02-01), Gigante
patent: 5064498 (1991-11-01), Miller
patent: 5252179 (1993-10-01), Ellerson et al.
patent: 5956142 (1999-09-01), Muller et al.
patent: 6238936 (2001-05-01), Yu
Weavers, Barry A., “Chemical Thinning of Silicon for Emission Microscopy Using Multi ETGH—An Introduction,” Nisene Technology Group, Inc., B&G International Division, Aug. 2000, pp. 1-6.
Hypervision, “Hypervision's PTF1 Portable Test Floor Emission Microscope,” Hypervision Inc., 2000, pp. 1-8.
Hypervision, “Sensor and Optics Technology: BEAMS and Mercad Telluride (MCT)”, Hypervision Inc., 2000, pp. 1-8.
Hypervision, “Chip UnZip Backside Preparation Tool,” Hypervision Inc., 2000, pp. 1-4.
Hypervision, “Chip UnZip: Low Stress Backside Semiconductor Preparation,” Hypervision, 1998, pp. 1-4.
Adams, Tom, “Backside Emission Microscopy of Wafers,”News and Analysis @Semiconductor Online, Feb. 28, 2000, pp. 1-3.
Adams, Tom, “Bringing the Emission Microscope to the Test Floor,”News and Analysis @Semiconductor Online, Jul. 1, 1999, pp. 1-4.
Hypervision, “BEAMS™ (Backside Emission Analysis Microscope System)”, Hypervision Inc., 1998, p. 1.
Clark, Scott, MSCE, “Etching Silicon Dioxide with Aqueous HF Solutions,”Silicon Dioxide Etch, Bold Technologies, Jan. 29, 2001, pp. 1-5.
Bold Technologies, “Manual Equipment”, Bold Technologies, Inc., 1998-2000, pp. 1-3.
Nisene Technology Group, “MultiEtch System,” Nisene Technology Group, Inc., Jul. 12, 2000, pp. 1-4.
Cook Carmen C.
Nisene Technology Group
Patent Law Group LLP
Vinh Lan
LandOfFree
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