Method and apparatus for estimating internal power consumption o

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Earth science

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39550006, 39550039, 702 60, G06F 1750

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060759321

ABSTRACT:
This is a method of quickly computing the power dissipated by a digital circuit using information available at the gate library level. It estimates the short-circuit power by modeling the energy dissipated by the cell per input transition as a function of the transition time or edge rate, and multiplying that value by the number of transitions per second for that input.

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Roy et al. "Circuit Activity Based Logic Synthesis for Low Power Reliable Operations," IEEE, pp. 503-513, Dec. 1993.
Najm et al. "Transition Density: A New Measure of Activity in Digital Circuits," IEEE, pp. 310-323, Feb. 1993.
Shen et al. "On Average Power Dissipation and Random Pattern Testability of CMOD Combinational Logic Networks," IEEE, pp. 402-407, Nov. 1992.

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