Method and apparatus for error current compensation

Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...

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323315, G05F 304

Patent

active

061603902

ABSTRACT:
A method and circuit for error current compensation is presented. The method includes the steps of generating a first current and an associated error current, generating a second current and an associated error current substantially equal to the first current and the first error current, respectively, and generating a third current substantially equal to the first current. The method includes the additional steps of extracting the second error current from the second current, generating a multiplied current equal to the scaled error current plus a multiplier error current, and combining the multiplied current with the first current and first error current.
The circuit for error current compensation includes a first, second and third current source, a multiplier, and a first and second subtractor. The first subtractor provides a first difference current equal to the difference of a second current and second error current generated by the second current source and a third current generated by the third current source. The multiplier generates a predetermined multiple of the second error current and a multiplier error current at its output terminal. The second subtractor provides a second difference current at its output equal to the difference of the predetermined multiple of the second error current and a multiplier error current from the output of the multiplier and a first current and first error current generated by the first current source. The second difference current is substantially equal to the first current from the first current source.

REFERENCES:
patent: 5512816 (1996-04-01), Lambert
patent: 5625281 (1997-04-01), Lambert

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