Coded data generation or conversion – Digital code to digital code converters
Reexamination Certificate
2005-06-07
2005-06-07
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
C714S755000, C714S790000
Reexamination Certificate
active
06903665
ABSTRACT:
A data encoder for encoding a codeword having a plurality of symbols for transmission through a data channel comprises a turbo encoder which has an interleaver, first and second RSC encoders, a puncturer and a mapper. The interleaver receives the codeword and provides an interleaved codeword. The first RSC encoder is for receiving the codeword and providing first parity bits in accordance with the codeword. The second RSC encoder is for receiving the interleaved codeword from the interleaver and providing second parity bits in accordance with the interleaved codeword. The puncturer is for receiving the codeword, the first parity bits and the second parity bits, and for puncturing at least the first and second parity bits in accordance with a pattern of a desired code rate. The mapper is for receiving the punctured parity bits, and for providing signal sets in accordance with the desired code rate.
REFERENCES:
patent: 5793818 (1998-08-01), Claydon et al.
patent: 6516437 (2003-02-01), Van Stralen et al.
patent: 6728927 (2004-04-01), Crozier
Stralen et al. (U.S. Appl. No. 10/356,872) “Turbo decoder control for use with a programmable inteleaver variable bloc length and multiple code rates”, filed Feb. 3, 2003.
Gray, U.S. Appl. No. 09/849,742, “Error Floor Turbo Codes”, filed May 4, 2001.
Akhter Mohammad Shahanshah
Mascioli Antonio
Wood Robert
Borden Ladner Gervais LLP
Jeanglaude Jean Bruner
Kinsman L. Anne
Spacebridge Semiconductor Corporation
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