Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-07-06
2003-05-06
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S063000, C345S213000
Reexamination Certificate
active
06559816
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a driving method and apparatus for a plasma display panel, and more particularly to a line erasing method and apparatus for a plasma display panel that is adapted to reduce a brightness difference between lines in the plasma display panel.
2. Description of the Related Art
Recently, a plasma display panel (PDP) feasible for a manufacturing of large-dimension panel has been highlighted as a plat panel display device. The PDP seals a discharge gas between two opposite glass substrates to provide a discharge space. Within this discharge space, electrodes for causing a discharge and barrier ribs for preventing optical and electrical interference between cells are provided.
Referring to
FIG. 1
, there is shown a conventional AC-type PDP driving apparatus that includes a PDP
100
having (m×n) cells
101
arranged in a matrix type, a scanning electrode driver
104
for driving scanning electrode lines Y
1
to Ym in the PDP
100
, a sustaining electrode driver
106
for driving sustaining electrode lines Z
1
to Zm in the PDP
100
, and first and second address electrode drivers
102
A and
102
B for supplying address electrode lines X
1
to Xn in the PDP
100
with a data. The scanning electrode driver
104
sequentially applies a scanning pulse and a sustaining pulse to the scanning electrode lines Y
1
to Ym, thereby scanning the cells
101
sequentially for each scanning line and sustaining a discharge at each of the selected cells
101
. The sustaining electrode driver
106
applies a sustaining pulse to all the sustaining electrode lines Z
1
to Zm. The first address electrode driver
102
A supplies odd-numbered address electrode lines X
1
, X
3
, . . . , Xn-
3
, Xn-
1
with a video data, whereas the second address driver
102
B supplies even-numbered address electrode lines X
2
, X
4
, . . . , Xn-
2
, Xn with a video data.
The conventional PDP driving apparatus further includes a data array
108
receiving a video data from the input line, a frame memory
112
and a data output
114
connected between the data array
108
and the address electrode drivers
102
A and
102
B, a controller
110
for controlling the data array
108
and the frame memory
112
, and a timing signal generator
116
for generating a timing signal under control of the controller
110
. The data array
108
rearranges the input video data for each bit under control of the controller
110
. The frame memory
112
stores a bit data inputted from the data array
108
under control of the controller
110
and supplies the data output
114
with the stored bit data. The data output
114
divides data from the frame memory
112
into one for odd-numbered cells and one for even-numbered cells to supply the divided data to the address electrode drivers
102
A and
102
B. Under control of the controller, the timing signal generator
116
applies a data latch signal to the address electrode drivers
102
A and
102
B and applies timing signals indicating an application time of a writing pulse, a scanning pulse, a sustaining pulse and an erasing pulse to the scanning electrode driver
104
and the sustaining electrode driver
106
. The controller
110
receives a clock signal CLK, a blank signal BLANK and vertical/horizontal synchronizing signals Vsync and Hsync inputted from the exterior thereof. The controller
106
controls the data array
108
, the frame memory
112
and the timing signal generator
116
on a basis of such external signals.
Generally, a driving method of the PDP
100
is classified into “address display separated (ADS) system” and “address while sustaining (AWS) system”. In the ADS system, the entire field is driven in a sequence of an address interval and a sustaining interval. On the other hand, in the AWS system, one field is divided into blocks including a plurality of scanning lines, and an address interval and a sustaining interval co-exist for each line block within one field.
In such a PDP driving method, one frame consists of a plurality of sub-fields to realize gray levels by a combination of the sub-fields. For instance, when it is intended to realize 256 gray levels, one frame interval is time-divided into 8 sub-fields.
In the ADS system, as shown in
FIG. 2
, each sub-field is again divided into a reset interval, an address interval and a sustaining interval. In the reset interval, the entire field is initialized. In the address interval, the cells
101
on which a data is to be displayed are selected by an address discharge. The selected cells
101
sustain the discharge in the sustaining interval. The sustaining interval is lengthened by each interval corresponding to 2
n
depending on a weighting value of each sub-field. In other words, the sustaining interval involved in each of the first to eighth sub-fields is lengthened at a ratio of 2
0
, 2
1
, 2
3
, 2
4
, 2
5
, 2
6
and 2
7
. To this end, the number of sustaining pulses generated in the sustaining interval also increases into 2
0
, 2
1
, 2
3
, 2
4
, 2
5
, 2
6
and 2
7
depending on the sub-fields. The brightness and the chrominance of a displayed image are determined in accordance with a combination of the sub-fields.
Referring now to
FIG. 3
, a data pulse DP is applied to the address electrode X in the address interval, whereas a scanning pulse-SCP and a sustaining pulse SUSP are applied to the scanning electrode Y in the address interval and the sustaining interval, respectively. A sustaining pulse SUSP with an identical phase is applied to the sustaining electrode Z. At a time in the address interval, an address discharge is generated between the address electrode X and the scanning electrode Y. At this time, a desired level of direct current voltage is applied to the sustaining electrode Z. This direct current voltage stabilizes an address discharge between the address electrode X and the scanning electrode Y. By this address discharge, a wall charge is accumulated in a dielectric layer within the cell
101
at b time. Subsequently, at c time when the sustaining interval is initiated, a sustaining discharge is generated between the scanning electrode Y and the sustaining electrode Z by the sustaining pulse SUSP applied to the scanning electrode Y. At d time when the sustaining pulse SUSP remains at a high level, a wall charge is accumulated in a dielectric layer within the cell
101
. This wall charge causes a memory effect that allows an electric field within the cell
101
to be maintained. In other words, a sustaining discharge is caused by an electric field formed by the wall charge and an electric field formed by the sustaining pulse SUSP. Accordingly, a discharge is not generated within the cell
101
in which a wall charge is not formed even though the sustaining pulse SUSP is applied thereto. Then, the sustaining pulse SUSP is applied to the sustaining electrode Z. The sustaining pulse SUSP is alternately applied to the scanning electrode Y and the sustaining electrode Z in this manner to cause a sustaining discharge. At a time when the sustaining interval is terminated, an erasing pulse EP is applied to the scanning electrodes Y simultaneously. The erasing pulse EP is set to have lower pulse width and magnitude in comparison to the sustaining pulse SUSP.
On the other hand, in the AWS system, a plurality of (usually, four to eight) lines SL are set into a line block as shown in FIG.
4
and
FIG. 5
assuming that a scanning line, that is, one row of cell should be one line. In such line blocks, each sub-field includes a write interval for simultaneously turning on cells in the entire field, an address interval for selecting the cells, a sustaining interval for maintaining a discharge of the cells that are not selected in the address interval, and a line erasing interval for erasing the sustaining discharge. Herein, the sustaining interval and the number of sustaining pulses is determined by a relative brightness ratio of each sub-field in similarity to the ADS system. Also, the same number of sustaining pulses at the sub-fi
Koo Bon Cheol
Lee Jae Hyuck
Dharia Prabodh
Fleshner & Kim LLP
LG Electronics Inc.
Shankar Vijay
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