Method and apparatus for encrypting input bit sequence

Cryptography – Communication system using cryptography – Data stream/substitution enciphering

Reexamination Certificate

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Details

C380S265000, C380S044000

Reexamination Certificate

active

06282291

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The subject invention relates to an encrypting method and apparatus, and more particularly to a method and apparatus for encrypting a key employed for encryption and for or outputting it in the form of a plain text.
2. Related Art
An encryption system always uses a secret key. For example, an RSA (Rivest, Shamir and Adelman) system which is a public key system or a DES (Data Encryption Standard) system which is a secret key system also use an additional secret key. It is required that the secret key should not be known by other persons and that the secret key should be prevented from being stolen. Thus, when the secret key itself is stored in the ROM (Read Only Memory) of a semiconductor chip, the secret key may be possibly determined from an analysis of the chip, and therefore, this method is not desirable.
In a prior art method for solving the above mentioned problem, a secret key is formed by an LFSR (Linear Feedback Shift Register). However, the LFSR requires a number of bits corresponding to the number of bits of the secret key, so that the cost of hardware has been disadvantageously increased.
The encryption apparatus of the RSA can be also used to determine the prime number of a number. The determination of the prime number is carried out, since the secret key in the RSA method must be a prime number. In the determination of the prime number, the secret key is exposed. If one encryption apparatus is employed both for determination of a prime number and for encryption, a mode which exposed a secret key and a mode which exposed the secret key will be needed. However, if the two modes are explicitly or clearly separated, a great hint will be given to a person who tries to steal the secret key. Therefore, it is not desirable to explicitly separate the modes.
SUMMARY OF THE INVENTION
The above mentioned problems are taken into consideration, and accordingly, it is an object of the subject invention to provide a method and apparatus for implicitly performing a mode which exposed a secret key and a mode which does not expose the secret key.
It is another object to effectively thwart a person who tries to steal a secret key by using the above stated method and apparatus.
The above described objects of the subject invention can be achieved by an apparatus mentioned below. Specifically stated, the apparatus comprises a bit sequence output circuit for outputting a bit sequence which is derived from an initial bit sequence in response to the input of the initial bit sequence; a switch signal output circuit for outputting a switch signal when it is detected that the bit sequence output circuit outputs a predetermined trap bit sequence; and a switch for switching from/to a process for encrypting an input bit sequence by using the bit sequence from the bit sequence output circuit to/from a process for outputting the input bit sequence in response to the receipt of the switch signal. The bit sequence output circuit can employ the above mentioned LFSR. In this case, the number of bits does not need to be larger than that described above. Further, in this case, the switch signal output circuit may also decide whether the LFSR holds the predetermined trap bit sequence or not. Further, a similar effect can be obtained by inspecting the output bit sequence.
In addition, the implicit mode change becomes possible by enabling the selection of the initial bit sequence which causes the bit sequence output circuit to output the predetermined trap bit sequence and the initial bit sequence which causes the predetermined trap bit sequence not to be outputted. Since a person observing from the outside cannot determine time when the trap bit sequence is generated and the switch signal is output, the separation of the initial bit sequence does not indicate that the mode is explicitly switched.
Still further, after the bit sequence output circuit outputs a predetermined number of bits, an input bit sequence may be input. Then, an input bit (secret key) may be input for postprocessing using the secret key. Further, if an initial value is determined so that the trap bit sequence is output during the output of the predetermined number of bits, the steps performed after the switching of mode will be simplified.
The above described encryption process may be implemented in part by an exclusive OR circuit. If so, input data needs to be prepared so that a bit sequence subjected to the exclusive OR process becomes the true secret key.
It will become more apparent from reading the detailed explanation below that the invention can be carried out by a circuit in semiconductor chip or software or the like.


REFERENCES:
patent: 4525599 (1985-06-01), Curran et al.
patent: 4555591 (1985-11-01), Nash
patent: 5495612 (1996-02-01), Hirayama et al.
patent: 5719819 (1998-02-01), Maeno
patent: 5974579 (1999-01-01), Lepejian
patent: 6011748 (2000-01-01), Lepejian
patent: 63-204325 (1987-02-01), None

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