Method and apparatus for employing a buffer memory to allow low

Details Method and apparatus for employing a buffer memory to allow low Method and apparatus for employing a buffer memory to allow low

1987-12-03

1991-11-12

Harkcom, Gary V.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340734, 340721, 358183, G09G 116, G06F 3153

Patent

active

050653466

ABSTRACT:
A low resolution to high resolution display system arranged such that a low resolution video signal from a personal computer is written in a memory plane in response to an address based on a clock signal produced from the personal computer side, a switching circuit is provided in a video signal path of a high resolution display apparatus for switching between the memory plane and the video signal produced by the high resolution display apparatus and the memory plane is read by an address based on the clock signal of the display apparatus produced during a display window period, whereby the video signal read from the memory plane is supplied through the switching circuit to the video signal path of the display apparatus.

REFERENCES:
patent: 4425581 (1984-01-01), Schweppe et al.
patent: 4542376 (1985-09-01), Bass et al.
patent: 4618859 (1986-10-01), Ikeda

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