Method and apparatus for electrostatically aligning...

Details Method and apparatus for electrostatically aligning... Method and apparatus for electrostatically aligning...

2006-02-07

2006-02-07

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

active

06995039

ABSTRACT:
One embodiment of the present invention provides a system that uses electrostatic forces to align semiconductor chips relative to each other. The system operates by fabricating a first set of conductors on the top surface of a first chip and fabricating a corresponding second set of conductors on the top surface of a second chip. To align the chips, the system electrically charges the first set of conductors and the second set of conductors. The system also places the first chip face-to-face with the second chip, so that the first set of conductors is in close proximity to the second set of conductors. This allows electrostatic forces between the first set of conductors and the second set of conductors to bring the first chip into alignment with the second chip and to hold them in place.

REFERENCES:
patent: 5545291 (1996-08-01), Smith et al.
patent: 5870517 (1999-02-01), Wyland
patent: 6300149 (2001-10-01), Smith
patent: 6429045 (2002-08-01), Furukawa et al.
patent: 6536106 (2003-03-01), Jackson et al.
patent: 6780696 (2004-08-01), Schatz
patent: 2001/0031514 (2001-10-01), Smith
patent: 2003/0189201 (2003-10-01), Chen
patent: 2004/0020039 (2004-02-01), Arneson et al.
patent: 2004/0038499 (2004-02-01), Kim et al.

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