Method and apparatus for electrostatic discharge protection...

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With means to increase breakdown voltage

Reexamination Certificate

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Details

C257S173000, C257S355000, C257S509000, C257S546000, C257S567000, C257S583000, C438S322000, C438S333000, C438S362000

Reexamination Certificate

active

07601990

ABSTRACT:
Electrostatic discharge (ESD) protection is provided for an integrated circuit. Snap back from a lower initial critical voltage and critical current is provided, as compared to contemporary designs. A dynamic region having doped regions is formed on a substrate, interconnects contacting the dynamic region. The dynamic region includes an Nwell region, a Pwell region and shallow diffusions, defining a PNP region, an NPN region and a voltage Breakdown region. In an aspect, the Nwell region includes a first N+ contact, a first P+ contact and an N+ doped enhancement, while the Pwell region includes a second N+ contact, a second P+ contact and a P+ doped enhancement. The N+ doped enhancement contacts the P+ doped enhancement forming the breakdown voltage region therebetween, in one case forming a buried breakdown voltage junction. Independent control is provided over breakdown voltage, NPN critical voltage, NPN critical current and PNP critical current, by varying doping levels, widths and positioning of various doping regions.

REFERENCES:
patent: 2008/0061368 (2008-03-01), Williams et al.

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