Abrading – Abrading process – Utilizing fluent abradant
Reexamination Certificate
2001-11-06
2004-04-20
Eley, Timothy V. (Department: 3724)
Abrading
Abrading process
Utilizing fluent abradant
C451S041000, C451S054000, C451S059000, C451S285000, C451S287000, C451S288000, C451S526000, C451S550000, C451S908000
Reexamination Certificate
active
06722950
ABSTRACT:
FIELD OF THE INVENTION
Embodiments of the invention relate to polishing of various layers formed on a semiconductor substrates. More particularly, embodiments of the invention relate to electrodialytic polishing of copper layers formed on semiconductor substrates.
BACKGROUND OF THE INVENTION
Integrated circuits are typically formed on substrates (for example silicon wafers) by the formation of various conductive, semiconductive and/or insulative layers. Although a layer may be etched after deposition to form a planarized surface, planarity may be improved with other techniques. Chemical mechanical polishing (CMP) is one accepted method of planarization, which tends to achieve improved planarity over an etch-back technique. CMP typically requires the substrate or wafer be mounted on a carrier or polishing head, with the surface of the layer to be polished exposed. The wafer is then placed against a moving (mechanical) polishing pad. The carrier head may rotate, as well as provide other motion between the wafer and the polishing surface. A polishing slurry, typically including an abrasive and at least one chemically reactive agent, may be introduced onto the polishing pad surface to provide the chemical component of CMP to polish the exposed surface.
When CMP is used on certain materials, such as a deposited copper layer of a semiconductor device, several problems may arise. First, copper generally has to be oxidized before a chemical slurry removes it. Second, dishing and erosion problems may occur between the abrasive particles in the slurry and copper, such as interconnects or lines on the wafer. To minimize dishing and erosion of a copper layer, polish pads have been manufactured with abrasive particles incorporated into the pad. However, these pads tend to introduce higher defects during polishing because the abrasives are fixed and, therefore, the friction is not a rolling friction. Pads with incorporated abrasive particles also may need special indexing mechanism and tooling to be implemented. Additionally, a continuous pad surface typically may be desirable because the abrasive is usually spent after a first pass. Another problem with using a chemical slurry in copper CMP is that a copper containing waste stream may be generated and may present an environmental hazard that may require special handling.
In applying conventional planarization techniques, such as CMP, it is extremely difficult to achieve a high degree of surface uniformity. This may be particularly so across a surface having a dense array of features. For example, copper lines bordered by an open field. A dense array of metal features is typically formed in an interlayer dielectric, such as silicon oxide layer, by a damascene technique wherein trenches are initially formed. A barrier layer, such as a Ta-containing layer (e.g. Ta, TaN) is then deposited lining the trenches and on the upper surface of the silicon oxide interlayer dielectric. Copper or a copper alloy is then deposited, as by electroplating, electroless plating, physical vapor deposition (PVD), or chemical vapor deposition (CVD). In planarizing the wafer surface after copper metallization using CMP, undesirable erosion and dishing typically occur, decreasing the degree of surface uniformity or planarity and challenging the depth of focus limitations of conventional photolithographic techniques, particular with respect to achieving submicron dimensions. Erosion is defined as the height differential between the oxide in the open field and the height of the oxide within the dense array. Dishing is defined as a difference in height between the oxide and Cu within the dense array.
Dishing and erosion formation are more important parameters in evaluating metal CMP processes. There are generally two causes for dishing formation: a) insufficient planarization and b) over-polish. CMP accomplishes planarization, but the efficiency of the planarization decreases significantly as the feature size increases on the substrate. Over-polish is performed to remove metal residue from a wafer's surface after CMP. Over-polish contributes significantly to dishing and erosion formation, especially when over-polish is done at a relatively high polish rate in order to have high throughput. Past efforts to improve dishing and erosion included modifications to the slurry, polishing pad and the process. It remains desirable to have a process of planarization where dishing and erosion are decreased.
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Dabral Sanjay
Pant Anil K.
Blakely , Sokoloff, Taylor & Zafman LLP
Eley Timothy V.
Planar Labs Corporation
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