Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Simultaneous deplating and plating
Reexamination Certificate
1998-12-01
2001-01-23
Gorgos, Kathryn (Department: 1741)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Simultaneous deplating and plating
C205S657000
Reexamination Certificate
active
06176992
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a Method and Apparatus for Electro Chemical Mechanical Deposition, and more particularly, to a method and apparatus that provides for both the deposition and polishing of a conductive material on a semiconductor wafer.
2. Background of the Invention
Metallization of semiconductor wafers, i.e. deposition of a layer of metal on the face of wafers over a barrier/seed layer of metal has important and broad application in the semiconductor industry. Conventionally, aluminum and other metals are deposited as one of many metal layers that make up a semiconductor chip. More recently, there is great interest in the deposition of copper for interconnects on semiconductor chips, since, as compared to aluminum, copper reduces electrical resistance and allows semiconductor chips using copper to run faster with less heat generation, resulting in a significant gain in chip capacity and efficiency.
Conformal thin film deposition of copper into deep submicron via holes and trenches is becoming more difficult in ULSI chip processing, especially when the feature sizes are decreasing below the 0.25 &mgr;m with aspect rations of greater that 5 to 1. Common chemical vapor deposition and electroplating techniques have been used to fill these deep cavities etched into silicon substrates. These processes so far have yielded a very high cost and defect density for developing and integrating local interconnects for ULSI technology.
One of the factors that contributes to the high cost is the manner in which the conductive material, and particularly copper, is applied, Specifically, it is well known to apply certain contaminants, known as leveling agents, in the electrolyte solution that prevent or slow down the rate of deposition of the metal to the surface of the wafer substrate. Since these contaminants have a large size in comparison to the size of the typical vie that needs to be filled, deposition of the metal on the surface of the wafer is, in part, prevented. This prevention, however, is achieved at the expense of adding contaminants to the electrolytic solution, which results, in part, in vias that do not have the desired conductive characteristics. In particular, the grain size of the deposited conductor, due to the use of such contaminants, is not as large as desired, which thereby results in quality problems for the resulting device, as well as increased expense due to significant annealing times that are subsequently required.
Further, the cost of achieving the desired structure, in which the conductive material exists in the via, but not on the substrate surface, still required separate deposition and polishing steps. After the conventional deposition of the metal using an anode, a cathode and electrolytic solution containing metal as is known, there is then required a polishing step, which polishing step is, for high performance devices at the present time, typically a chemical-mechanical polishing step. While chemical mechanical polishing achieves the desired result, it achieves it at considerable expense, and requires a great degree of precision in applying a slurry in order to achieve the desired high degree of polish on the conductive surface.
Accordingly, a less expensive and more accurate manner of applying a conductor to a semiconductor wafer is needed.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method and apparatus that both deposits and polishes a conductive material on a semiconductor wafer.
It is an object of the present invention to provide a method and apparatus that simultaneously deposits and polishes a conductive material on a semiconductor wafer.
It is an object of the present invention to provide a method and apparatus that simultaneously deposits a conductive material in deep cavities of a semiconductor wafer and polishes/starves electrolytic solution from the top surface area of the semiconductor wafer.
It is a further object of the present invention to provide a method and apparatus that recirculates the electrolytic solution used in depositing the conductive material on the semiconductor wafer.
These and other object of the present invention are obtained by depositing a conductive material form an electrolyte solution to a predetermined area of a wafer. The steps that are used when making this application include applying the conductive material to the predetermined area of the wafer using an electrolyte solution disposed on a surface of the wafer when the wafer is disposed in proximity to an anode, and preventing accumulation of the conductive material to areas other than the predetermined area by mechanically polishing, protecting, or reducing form electrolyte contact to the other areas while the conductive material is being deposited.
An apparatus that performs this method includes an anode capable of receiving a first potential upon application of power, A cathode or the wafer is spaced from the anode and is capable of receiving a second potential opposite the first potential upon application of power. A pad or a multiple number of pads is/are disposed between the anode and the cathode, the pad being movable with respect to a surface of the wafer and inhibiting or reducing application of the conductive material to certain other areas when power is being supplied to the anode and the cathode. Further, a fluid chamber allows an electrolyte solution to be disposed on the surface of the wafer or the pad and the conductive material to be formed on desired areas of the wafer upon application of power.
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Gorgos Kathryn
Nutool, Inc.
Pillsbury Madison & Sutro LLP
Smith-Hicks Erica
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