Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-04-16
2001-07-10
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S1540PB, C324S758010, C324S765010
Reexamination Certificate
active
06259261
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of manufacturing semiconductor devices. More particularly, the present invention relates to the field of electrically testing electronic devices formed on a semiconductor wafer, especially prior to slicing the wafer into individual semiconductor chips.
BACKGROUND OF THE INVENTION
Microelectronic circuits formed on computer chips are used in an amazingly wide variety of applications. For example, computer chips are used to control fuel-injection systems in automobiles, to regulate thermostats heating homes, and to place calls with a wireless telephone.
Circuits and individual circuit elements are formed on a computer or semiconductor chip by repeatedly depositing and patterning layers of material on a semiconductor wafer. The wafer is then sliced into chips that are incorporated into many electronic devices.
After the semiconductor devices and electronic circuits are formed on a semiconductor wafer, but before the wafer is sliced into individual chips, it is the industry practice to electrically test the circuits on the wafer to ensure that they are functioning properly. Chips with malfunctioning circuits are marked and discarded.
Because the circuits and circuit elements formed on a wafer are microscopic, a robot called a prober is used to test the circuits on a semiconductor wafer. The typical prober includes a probe card with electric leads or probes which extend from the probe card in a pattern that corresponds to electrical contact points or pads on the wafer to be tested. The wafer is brought into contact with the leads of the probe card, thereby effectively plugging the circuit on the wafer into the prober through the probe card. Electrical currents or voltage potentials can then be applied through the leads of the probe card to the circuit on the wafer to test the circuit for proper operation.
A typical probe card is illustrated in FIG.
1
. As shown in
FIG. 1
, the probe card includes an epoxy ring (
103
) around an inner periphery of an annular printed circuit board (
101
). A number of probe leads (
104
) are embedded within the epoxy ring (
103
). Each probe lead (
104
) is electrically connected to circuits on the printed circuit board (
101
) at one end (
107
), and angled into a probe tip (
105
) at the other end.
As described above, a wafer (
106
) being tested includes a number of contact pads (
107
) which are used to electrically connect the circuits on the wafer (
106
) to the prober through the probe leads (
104
) of the probe card. In conventional systems, the wafer (
106
) is moved in the XY plane to align the pads (
107
) with the probe tips (
105
). The wafer (
106
) is then raised to bring the pads (
107
) into contact with the probe tips (
105
).
There are a number of problems with this probe card arrangement and method of testing circuits on semiconductor wafers. For example, every time a different type of circuit is to be tested, the probe card on the tester must be replaced to provide a probe card with a pattern of probe leads (
104
) that corresponds to the pads (
107
) on the circuit to be tested. Replacing the probe card has traditionally been a difficult and time-consuming process.
Moreover, probe cards are expensive, and a large number of probe cards must be stored to account for the wide variety of possible lead patterns that may be needed to test the circuits being produced. Additionally, probe cards are fragile and difficult or impossible to repair if damaged.
Another problem arises from the procedure of positioning the wafer with respect to the probe leads prior to testing. The wafer must be positioned and repositioned repeatedly so as to test the large number of individual circuits on a single wafer. The wafer is typically held on a moving wafer chuck that positions the wafer for testing. The wafer chuck typically incorporates a vacuum system that holds the wafer in place with a vacuum applied thereto.
The wafer chuck, particularly a vacuum chuck, is a relatively cumbersome device. Therefore, excessive time and energy are expended in positioning and repositioning the wafer for testing. This bottleneck decreases the production capacity of current wafer testing systems.
Finally, a third problem arises in the mechanics of contacting the probe tips (
105
) with the contact pads (
107
). Due to the angle of the leads (
105
) and the further angle of the probe tips (
105
), when the contact pads (
107
) of the wafer (
106
) are pressed against the probe tips (
105
), there is some lateral movement of the probe tip (
105
) in the XY plane across the contact pad (
107
).
This results in wear to the probe tip (
105
) and scratching on the contact pad (
107
). Additionally, the pads (
107
) are frequently covered with coatings of aluminum oxide and organo-metallic debris. This material may be collected on the probe tip (
105
) as it scrubs over the pad surface (
107
). As the probe tip (
105
) becomes worn or collects material scratched from the contact pads (
107
), it may no longer make a proper electrical connection to the contact pads (
107
) or may make a false connection with a portion of the circuit being tested other than through the pad (
107
).
In some instances, circuits on wafers are heated prior to testing to simulate actual operating conditions. If the testing is done in an environment where heat is applied, the probe leads (
104
) may expand due to thermal expansion, thereby misaligning the probe tips (
105
) with the contact pads (
107
). The result may be a probe tip (
105
) that contacts the wafer (
106
) other than on the contact pad (
107
) thereby causing damage to the circuits or circuit elements on the wafer (
106
).
Consequently, there is a need in the art for a method and a device of testing circuits and circuit elements on semiconductor wafers that is easily modified to accommodate different contact pad patterns on the device being tested. There is a further need for a method and device for testing semiconductor wafers in which the relative positioning and repositioning of the wafer and the probe tips can be quickly and accurately accomplished. Finally, there is a need in the art for a method and device of testing semiconductor wafers in which the probe tips are not subject to a high degree of wear, the accumulation of material from the contact pads or misalignment due to the thermal expansion of a lead.
SUMMARY OF THE INVENTION
It is an object of the present invention to meet the above-described needs and others. Specifically, it is an object of the present invention to provide a method and a device of testing circuits and circuit elements on semiconductor wafers that is easily modified to accommodate different contact pad patterns on the device being tested. It is a further object of the present invention to provide a method and device for testing semiconductor wafers in which the relative positioning and repositioning of the wafer and the probe tips can be quickly and accurately accomplished. Additionally, it is an object of the present invention to provide a method and device for testing semiconductor wafers in which the probe tips are not subject to a high degree of wear, the accumulation of material from the contact pads or misalignment due to the thermal expansion of a lead.
Additional objects, advantages and novel features of the invention will be set forth in the description which follows or may be learned by those skilled in the art through reading these materials or practicing the invention. The objects and advantages of the invention may be achieved through the means recited in the attached claims.
To achieve these stated and other objects, the present invention may be embodied and described as a probe head for electrically testing structures formed on a semiconductor wafer. The probe head of the present invention includes an array of pins which are biased in a retracted position; and a selector for selectively extending pins from the array of pins to form a pin pattern for testing the structures on a semiconductor wafer.
The selector of the pr
Deckert Richard Allan
Engelking Steven
Evans Joey Dean
Kananen Ronald P.
Metjahic Safet
Nguyen Jimmy
Rader Fishman & Grauer
Sony Corporation
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