Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...
Patent
1998-04-01
2000-09-05
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Byte-word rearranging, bit-field insertion or extraction,...
708520, 712 22, 712 23, C06F 700
Patent
active
061158127
ABSTRACT:
An apparatus and method for performing vertical parallel operations on packed data is described. A first set of data operands and a second set of data operands are accessed. Each of these sets of data represents graphical data stored in a first format. The first set of data operands is convereted into a converted set and the second set of data operands is replicated to generate a replicated set. A vertical matrix multiplication is performed on the converted set and the replicated set to generate transformed graphical data.
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Abdallah Mohammad
Huff Thomas
Parrish Gregory C.
Thakkar Shreekant S.
An Meng-Ai T.
Benson Walter
Intel Corporation
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